eive/eive-obsw
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sus brd assy health handling
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This commit is contained in:
Robin Müller 2023-03-02 14:59:27 +01:00
parent b5049fa8d0
commit 0fc17624f3
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GPG Key ID: 11D4952C8CCEF814
8 changed files with 182 additions and 86 deletions
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2
bsp_q7s/core/CoreController.cpp
View File

@ -1224,7 +1224,7 @@ ReturnValue_t CoreController::handleProtInfoUpdateLine(std::string nextLine) {
}
}
wordIdx++;
if(wordIdx >= 10) {
if (wordIdx >= 10) {
break;
}
}

2
common/config/eive/definitions.h
View File

@ -83,7 +83,7 @@ static constexpr float SCHED_BLOCK_7_PERIOD = static_cast<float>(SCHED_BLOCK_7_R
static constexpr float SCHED_BLOCK_8_PERIOD = static_cast<float>(SCHED_BLOCK_8_PLPCDU_MS) / 400.0;
static constexpr float SCHED_BLOCK_9_PERIOD = static_cast<float>(SCHED_BLOCK_9_RAD_SENS_MS) / 400.0;
} // namespace acs
} // namespace spiSched
} // namespace config

224
mission/core/pollingSeqTables.cpp
View File

@ -251,53 +251,77 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
}
if (cfg.scheduleStr) {
@ -313,15 +337,20 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
if (cfg.scheduleAcsBoard) {
if (enableAside) {
// A side
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
@ -331,23 +360,31 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
}
if (enableBside) {
// B side
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
@ -357,11 +394,14 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
}
if (enableAside) {
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
@ -371,21 +411,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
}
if (enableBside) {
@ -396,21 +444,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
}
}
@ -429,7 +485,8 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
imtq::ComStep::READ_MEASURE_GET);
}
thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD, 0);
thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD,
0);
if (cfg.scheduleImtq) {
// This is the torquing cycle.
@ -491,23 +548,34 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
DeviceHandlerIF::GET_READ);
}
thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD, 0);
thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD,
0);
#if OBSW_ADD_PL_PCDU == 1
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
DeviceHandlerIF::GET_READ);
#endif
#if OBSW_ADD_RAD_SENSORS == 1
/* Radiation sensor */
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
DeviceHandlerIF::GET_READ);
#endif
return returnvalue::OK;
}

2
mission/devices/ImtqHandler.cpp
View File

@ -849,7 +849,7 @@ void ImtqHandler::fillCalibratedMtmDataset(const uint8_t* packet) {
void ImtqHandler::fillRawMtmDataset(imtq::RawMtmMeasurementSet& set, const uint8_t* packet) {
PoolReadGuard rg(&set);
if(rg.getReadResult() != returnvalue::OK) {
if (rg.getReadResult() != returnvalue::OK) {
sif::error << "ImtqHandler::fillRawMtmDataset: Lock failure" << std::endl;
}
unsigned int offset = 2;

1
mission/devices/SusHandler.h
View File

@ -3,6 +3,7 @@
#include <eive/eventSubsystemIds.h>
#include <eive/resultClassIds.h>
#include "fsfw/devicehandlers/DeviceHandlerBase.h"
#include "fsfw/globalfunctions/PeriodicOperationDivider.h"
#include "mission/devices/devicedefinitions/acsPolling.h"

26
mission/system/objects/SusAssembly.cpp
View File

@ -24,6 +24,12 @@ ReturnValue_t SusAssembly::commandChildren(Mode_t mode, Submode_t submode) {
modeTable[idx].setMode(MODE_OFF);
modeTable[idx].setSubmode(SUBMODE_NONE);
}
if (recoveryState == RecoveryState::RECOVERY_IDLE) {
result = checkAndHandleHealthStates(mode, submode);
if (result == NEED_TO_CHANGE_HEALTH) {
return returnvalue::OK;
}
}
if (recoveryState != RecoveryState::RECOVERY_STARTED) {
if (mode == DeviceHandlerIF::MODE_NORMAL or mode == MODE_ON) {
result = handleNormalOrOnModeCmd(mode, submode);
@ -148,3 +154,23 @@ void SusAssembly::refreshHelperModes() {
helper.susModes[idx] = childrenMap[helper.susIds[idx]].mode;
}
}
ReturnValue_t SusAssembly::checkAndHandleHealthStates(Mode_t deviceMode, Submode_t deviceSubmode) {
using namespace returnvalue;
ReturnValue_t status = returnvalue::OK;
auto overwriteHealthForOneDev = [&](object_id_t dev) {
HealthState health = healthHelper.healthTable->getHealth(dev);
if (health == FAULTY or health == PERMANENT_FAULTY) {
overwriteDeviceHealth(dev, health);
status = NEED_TO_CHANGE_HEALTH;
} else if (health == EXTERNAL_CONTROL) {
modeHelper.setForced(true);
}
};
if (deviceSubmode == duallane::DUAL_MODE) {
for (uint8_t idx = 0; idx < 12; idx++) {
overwriteHealthForOneDev(helper.susIds[idx]);
}
}
return status;
}

1
mission/system/objects/SusAssembly.h
View File

@ -66,6 +66,7 @@ class SusAssembly : public DualLaneAssemblyBase {
void powerStateMachine(Mode_t mode, Submode_t submode);
ReturnValue_t handleNormalOrOnModeCmd(Mode_t mode, Submode_t submode);
void refreshHelperModes();
ReturnValue_t checkAndHandleHealthStates(Mode_t deviceMode, Submode_t deviceSubmode);
};
#endif /* MISSION_SYSTEM_SUSASSEMBLY_H_ */

10
mission/system/tree/system.cpp
View File

@ -93,13 +93,13 @@ void buildSafeSequence(Subsystem& ss, ModeListEntry& eh) {
ctxc);
// Build SAFE transition 1
//check(ss.addTable(TableEntry(EIVE_TABLE_SAFE_TRANS_1.first, &EIVE_TABLE_SAFE_TRANS_1.second)),
// check(ss.addTable(TableEntry(EIVE_TABLE_SAFE_TRANS_1.first, &EIVE_TABLE_SAFE_TRANS_1.second)),
// ctxc);
// Build Safe sequence
ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TGT.first, 0, false);
ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_0.first, 0, false);
//ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_1.first, 0, false);
// ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_1.first, 0, false);
check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_SAFE.first, &EIVE_SEQUENCE_SAFE.second,
EIVE_SEQUENCE_SAFE.first)),
ctxc);
@ -135,13 +135,13 @@ void buildIdleSequence(Subsystem& ss, ModeListEntry& eh) {
ctxc);
// Build SAFE transition 1
//check(ss.addTable(TableEntry(EIVE_TABLE_IDLE_TRANS_1.first, &EIVE_TABLE_IDLE_TRANS_1.second)),
// ctxc);
// check(ss.addTable(TableEntry(EIVE_TABLE_IDLE_TRANS_1.first, &EIVE_TABLE_IDLE_TRANS_1.second)),
// ctxc);
// Build Safe sequence
ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TGT.first, 0, false);
ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_0.first, 0, false);
//ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_1.first, 0, false);
// ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_1.first, 0, false);
check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_IDLE.first, &EIVE_SEQUENCE_IDLE.second,
EIVE_SEQUENCE_SAFE.first)),
ctxc);