introduced axi configuration interface for ptme ip core
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@ -973,8 +973,7 @@ void ObjectFactory::createCcsdsComponents(LinuxLibgpioIF* gpioComIF) {
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gpioComIF->addGpios(gpioCookiePdec);
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new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, gpioComIF, gpioIds::PDEC_RESET,
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std::string(q7s::UIO_PDEC_CONFIG_MEMORY), std::string(q7s::UIO_PDEC_RAM),
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std::string(q7s::UIO_PDEC_REGISTERS));
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q7s::UIO_PDEC_CONFIG_MEMORY, q7s::UIO_PDEC_RAM, q7s::UIO_PDEC_REGISTERS);
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#if BOARD_TE0720 == 0
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GpioCookie* gpioRS485Chip = new GpioCookie;
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@ -24,6 +24,7 @@ enum commonClassIds: uint8_t {
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PLOC_MEMORY_DUMPER, //PLMEMDUMP
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PDEC_HANDLER, //PDEC
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CCSDS_HANDLER, //CCSDS
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RATE_SETTER, //RS
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ARCSEC_JSON_BASE, //JSONBASE
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NVM_PARAM_BASE, //NVMB
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COMMON_CLASS_ID_END // [EXPORT] : [END]
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2
fsfw
2
fsfw
@ -1 +1 @@
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Subproject commit c1e0bcee6db652d6c474c87a4099e61ecf86b694
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Subproject commit faf7da2743dcd30d83c3ab2f7b4d85277878e636
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@ -1,16 +1,14 @@
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#include "PdecHandler.h"
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <cstring>
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#include <sstream>
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#include "OBSWConfig.h"
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#include "PdecHandler.h"
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#include "fsfw/ipc/QueueFactory.h"
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#include "fsfw/objectmanager/ObjectManager.h"
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#include "fsfw/serviceinterface/ServiceInterface.h"
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#include "fsfw/tmtcservices/TmTcMessage.h"
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#include "fsfw_hal/linux/uio/UioMapper.h"
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PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId,
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LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, std::string uioConfigMemory,
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@ -44,17 +42,18 @@ ReturnValue_t PdecHandler::initialize() {
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ReturnValue_t result = RETURN_OK;
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result = getRegisterAddress();
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UioMapper regMapper(uioRegisters);
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result = regMapper.getMappedAdress(®isterBaseAddress, UioMapper::Permissions::READ_WRITE);
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if (result != RETURN_OK) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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result = getConfigMemoryBaseAddress();
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UioMapper configMemMapper(uioConfigMemory);
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result = configMemMapper.getMappedAdress(&memoryBaseAddress, UioMapper::Permissions::READ_WRITE);
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if (result != RETURN_OK) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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result = getRamBaseAddress();
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UioMapper ramMapper(uioRamMemory);
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result = ramMapper.getMappedAdress(&ramBaseAddress, UioMapper::Permissions::READ_WRITE);
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if (result != RETURN_OK) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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@ -76,55 +75,6 @@ ReturnValue_t PdecHandler::initialize() {
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MessageQueueId_t PdecHandler::getCommandQueue() const { return commandQueue->getId(); }
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ReturnValue_t PdecHandler::getRegisterAddress() {
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int fd = open(uioRegisters.c_str(), O_RDWR);
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if (fd < 1) {
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sif::warning << "PdecHandler::getRegisterAddress: Invalid UIO device file" << std::endl;
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return RETURN_FAILED;
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}
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registerBaseAddress = static_cast<uint32_t*>(
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mmap(NULL, REGISTER_MAP_SIZE, PROT_WRITE | PROT_READ, MAP_SHARED, fd, 0));
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if (registerBaseAddress == MAP_FAILED) {
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sif::error << "PdecHandler::getRegisterAddress: Failed to map uio address" << std::endl;
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return RETURN_FAILED;
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}
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return RETURN_OK;
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}
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ReturnValue_t PdecHandler::getConfigMemoryBaseAddress() {
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int fd = open(uioConfigMemory.c_str(), O_RDWR);
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if (fd < 1) {
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sif::warning << "PdecHandler::getConfigMemoryBaseAddress: Invalid UIO device file" << std::endl;
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return RETURN_FAILED;
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}
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memoryBaseAddress = static_cast<uint32_t*>(
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mmap(NULL, CONFIG_MEMORY_MAP_SIZE, PROT_WRITE | PROT_READ, MAP_SHARED, fd, 0));
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if (memoryBaseAddress == MAP_FAILED) {
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sif::error << "PdecHandler::getConfigMemoryBaseAddress: Failed to map uio address" << std::endl;
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return RETURN_FAILED;
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}
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return RETURN_OK;
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}
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ReturnValue_t PdecHandler::getRamBaseAddress() {
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int fd = open(uioRamMemory.c_str(), O_RDWR);
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ramBaseAddress =
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static_cast<uint32_t*>(mmap(NULL, RAM_MAP_SIZE, PROT_WRITE | PROT_READ, MAP_SHARED, fd, 0));
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if (ramBaseAddress == MAP_FAILED) {
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sif::error << "PdecHandler::getRamBaseAddress: Failed to map RAM base address" << std::endl;
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return RETURN_FAILED;
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}
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return RETURN_OK;
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}
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void PdecHandler::writePdecConfig() {
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PdecConfig pdecConfig;
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@ -231,25 +231,6 @@ class PdecHandler : public SystemObject,
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*/
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void readCommandQueue(void);
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/**
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* @brief Opens UIO device assigned to AXI to AHB converter giving access to the PDEC
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* registers. The register base address will be mapped into the virtual address space.
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*/
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ReturnValue_t getRegisterAddress();
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/**
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* @brief Opens UIO device assigned to the base address of the PDEC memory space and maps the
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* physical address into the virtual address space.
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*/
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ReturnValue_t getConfigMemoryBaseAddress();
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/**
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* @brief Opens UIO device assigned to the RAM section of the PDEC IP core memory map.
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*
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* @details A received TC segment will be written to this memory area.
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*/
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ReturnValue_t getRamBaseAddress();
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/**
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* @brief This functions writes the configuration parameters to the configuration
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* section of the PDEC.
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@ -8,34 +8,20 @@ PtmeRateSetter::PtmeRateSetter(object_id_t objectId, PtmeAxiConfig* ptmeAxiConfi
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PtmeRateSetter::~PtmeRateSetter() {}
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ReturnValue_t PtmeRateSetter::initialize() {
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if (ptmeAxiConfig == nullptr) {
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sif::warning << "PtmeRateSetter::initialize: Invalid PtmeAxiConfig object" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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return HasReturnvaluesIF::RETURN_OK;
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if (ptmeAxiConfig == nullptr) {
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sif::warning << "PtmeRateSetter::initialize: Invalid PtmeAxiConfig object" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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return HasReturnvaluesIF::RETURN_OK;
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}
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ReturnValue_t PtmeRateSetter::setRate(BitRates rate) {
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uint8_t rateVal = 0;
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switch (rate) {
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case RATE_2000KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 2000000 - 1);
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break;
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case RATE_1000KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 1000000 - 1);
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break;
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case RATE_500KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 500000 - 1);
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break;
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case RATE_200KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 200000 - 1);
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break;
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case RATE_100KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 100000 - 1);
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break;
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default:
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sif::debug << "PtmeRateSetter::setRate: Unknown bit rate" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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ReturnValue_t PtmeRateSetter::setRate(uint32_t bitRate) {
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if (bitRate == 0) {
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return BAD_BIT_RATE;
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}
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return ptmeAxiConfig->writeCaduRateReg(rateVal);
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uint32_t rateVal = PtmeConfig::BIT_CLK_FREQ / bitRate - 1;
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if (rateVal > 0xFF) {
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return RATE_NOT_SUPPORTED;
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}
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return ptmeAxiConfig->writeCaduRateReg(static_cast<uint8_t>(rateVal));
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}
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@ -16,23 +16,33 @@
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*
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* @author J. Meier
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*/
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class PtmeRateSetter: public TxRateSetterIF, public SystemObject {
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public:
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/**
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* @brief Constructor
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*
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* objectId Object id of system object
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* ptmeAxiConfig Pointer to object providing access to PTME configuration registers.
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*/
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PtmeRateSetter(object_id_t objectId, PtmeAxiConfig* ptmeAxiConfig);
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virtual ~PtmeRateSetter();
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class PtmeRateSetter : public TxRateSetterIF, public SystemObject, public HasReturnvaluesIF {
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public:
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/**
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* @brief Constructor
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*
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* objectId Object id of system object
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* ptmeAxiConfig Pointer to object providing access to PTME configuration registers.
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*/
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PtmeRateSetter(object_id_t objectId, PtmeAxiConfig* ptmeAxiConfig);
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virtual ~PtmeRateSetter();
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virtual ReturnValue_t initialize() override;
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virtual ReturnValue_t setRate(BitRates rate);
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virtual ReturnValue_t initialize() override;
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virtual ReturnValue_t setRate(uint32_t bitRate);
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private:
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private:
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PtmeAxiConfig* ptmeAxiConfig = nullptr;
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static const uint8_t INTERFACE_ID = CLASS_ID::RATE_SETTER;
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//! [EXPORT] : [COMMENT] The commanded rate is not supported by the current FPGA design
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static const ReturnValue_t RATE_NOT_SUPPORTED = MAKE_RETURN_CODE(0xA0);
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//! [EXPORT] : [COMMENT] Bad bitrate has been commanded (e.g. 0)
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static const ReturnValue_t BAD_BIT_RATE = MAKE_RETURN_CODE(0xA1);
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// Bitrate register field is only 8 bit wide
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static const uint32_t MAX_BITRATE = 0xFF;
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PtmeAxiConfig* ptmeAxiConfig = nullptr;
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};
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#endif /* LINUX_OBC_PTMERATESETTER_H_ */
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@ -3,15 +3,6 @@
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#include "fsfw/returnvalues/HasReturnvaluesIF.h"
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enum BitRates : uint32_t {
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RATE_2000KBPS,
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RATE_1000KBPS,
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RATE_500KBPS,
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RATE_400KBPS,
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RATE_200KBPS,
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RATE_100KBPS
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};
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/**
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* @brief Abstract class for objects implementing the functionality to switch the
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* downlink bit rate.
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@ -23,7 +14,7 @@ class TxRateSetterIF {
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TxRateSetterIF(){};
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virtual ~TxRateSetterIF(){};
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virtual ReturnValue_t setRate(BitRates bitRate) = 0;
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virtual ReturnValue_t setRate(uint32_t bitRate) = 0;
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};
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#endif /* LINUX_OBC_TXRATESETTERIF_H_ */
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@ -5,6 +5,7 @@
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#include "fsfw/events/EventManagerIF.h"
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#include "fsfw/ipc/QueueFactory.h"
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#include "fsfw/objectmanager/ObjectManager.h"
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#include "fsfw/serialize/SerializeAdapter.h"
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#include "fsfw/serviceinterface/ServiceInterface.h"
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#include "fsfw/serviceinterface/serviceInterfaceDefintions.h"
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@ -189,14 +190,21 @@ MessageQueueId_t CCSDSHandler::getRequestQueue() {
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ReturnValue_t CCSDSHandler::executeAction(ActionId_t actionId, MessageQueueId_t commandedBy,
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const uint8_t* data, size_t size) {
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ReturnValue_t result = RETURN_OK;
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switch (actionId) {
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case SET_LOW_RATE: {
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txRateSetterIF->setRate(BitRates::RATE_100KBPS);
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return EXECUTION_FINISHED;
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result = txRateSetterIF->setRate(RATE_100KBPS);
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break;
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}
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case SET_HIGH_RATE: {
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txRateSetterIF->setRate(BitRates::RATE_500KBPS);
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return EXECUTION_FINISHED;
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result = txRateSetterIF->setRate(RATE_500KBPS);
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break;
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}
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case ARBITRARY_RATE: {
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uint32_t bitrate = 0;
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SerializeAdapter::deSerialize(&bitrate, &data, &size, SerializeIF::Endianness::BIG);
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result = txRateSetterIF->setRate(bitrate);
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break;
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}
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case EN_TRANSMITTER: {
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enableTransmit();
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@ -209,6 +217,10 @@ ReturnValue_t CCSDSHandler::executeAction(ActionId_t actionId, MessageQueueId_t
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default:
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return COMMAND_NOT_IMPLEMENTED;
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}
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if (result != RETURN_OK) {
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return result;
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}
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return EXECUTION_FINISHED;
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}
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void CCSDSHandler::checkEvents() {
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@ -88,6 +88,13 @@ class CCSDSHandler : public SystemObject,
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static const ActionId_t SET_HIGH_RATE = 1;
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static const ActionId_t EN_TRANSMITTER = 2;
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static const ActionId_t DIS_TRANSMITTER = 3;
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static const ActionId_t ARBITRARY_RATE = 4;
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// Syrlinks supports two bitrates (200 kbps and 1000 kbps)
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// Due to convolutional code added by the syrlinks the input frequency must be half the
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// target frequency
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static const uint32_t RATE_100KBPS = 100000;
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static const uint32_t RATE_500KBPS = 500000;
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//! [EXPORT] : [COMMENT] Received action message with unknown action id
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static const ReturnValue_t COMMAND_NOT_IMPLEMENTED = MAKE_RETURN_CODE(0xA0);
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2
tmtc
2
tmtc
@ -1 +1 @@
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Subproject commit 580ac8b2d7e73aa860f3de55066187d7684d2d64
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Subproject commit 598635ee4fb1eb246980564ae9f3a0feb1f4da30
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