irq working

dummies/CoreControllerDummy.cpp

@@ -6,8 +6,7 @@
 #include <cmath>
 #include <cstdlib>
 
-CoreControllerDummy::CoreControllerDummy(object_id_t objectId)
-    : ExtendedControllerBase(objectId) {}
+CoreControllerDummy::CoreControllerDummy(object_id_t objectId) : ExtendedControllerBase(objectId) {}
 
 ReturnValue_t CoreControllerDummy::initialize() {
   static bool done = false;

dummies/SusDummy.cpp

@@ -5,8 +5,7 @@
 #include <cmath>
 #include <cstdlib>
 
-SusDummy::SusDummy()
-    : ExtendedControllerBase(objects::SUS_0_N_LOC_XFYFZM_PT_XF), susSet(this) {
+SusDummy::SusDummy() : ExtendedControllerBase(objects::SUS_0_N_LOC_XFYFZM_PT_XF), susSet(this) {
   ObjectManager::instance()->insert(objects::SUS_6_R_LOC_XFYBZM_PT_XF, this);
   ObjectManager::instance()->insert(objects::SUS_1_N_LOC_XBYFZM_PT_XB, this);
   ObjectManager::instance()->insert(objects::SUS_7_R_LOC_XBYBZM_PT_XB, this);

linux/ipcore/PdecHandler.cpp

@@ -72,14 +72,19 @@ ReturnValue_t PdecHandler::initialize() {
     sif::error << "Can not use IRQ mode if IRQ UIO name is invalid" << std::endl;
     return returnvalue::FAILED;
   }
-
-  writePdecConfig();
+  PdecConfig pdecConfig;
+  writePdecConfigDuringReset(pdecConfig);
 
   result = releasePdec();
   if (result != returnvalue::OK) {
     return ObjectManagerIF::CHILD_INIT_FAILED;
   }
 
+  // This configuration must be done while the PDEC is not held in reset.
+  if (OP_MODE == Modes::IRQ) {
+    // Configure interrupt mask register to enable interrupts
+    *(registerBaseAddress + PDEC_IMR_OFFSET) = pdecConfig.getImrReg();
+  }
   result = actionHelper.initialize(commandQueue);
   if (result != returnvalue::OK) {
     return result;
@@ -170,8 +175,6 @@ ReturnValue_t PdecHandler::irqOperation() {
           // No TCs for timeout period
           checkLocks();
           lockCheckCd.resetTimer();
-          uint32_t pisr = *(registerBaseAddress + PDEC_PISR_OFFSET);
-          sif::debug << "Current PISR: " << pisr << std::endl;
         } else if (ret >= 1) {
           nb = read(fd, &info, sizeof(info));
           if (nb == static_cast<ssize_t>(sizeof(info))) {
@@ -230,17 +233,10 @@ void PdecHandler::readCommandQueue(void) {
 
 MessageQueueId_t PdecHandler::getCommandQueue() const { return commandQueue->getId(); }
 
-void PdecHandler::writePdecConfig() {
-  PdecConfig pdecConfig;
-
+void PdecHandler::writePdecConfigDuringReset(PdecConfig& pdecConfig) {
   *(memoryBaseAddress + FRAME_HEADER_OFFSET) = pdecConfig.getConfigWord(0);
   *(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1);
 
-  if (OP_MODE == Modes::IRQ) {
-    // Configure interrupt mask register to enable interrupts
-    *(registerBaseAddress + PDEC_IMR_OFFSET) = pdecConfig.getImrReg();
-  }
-
   // Configure all MAP IDs as invalid
   for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
     *(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) =
@@ -261,8 +257,8 @@ void PdecHandler::writePdecConfig() {
 
 ReturnValue_t PdecHandler::resetFarStatFlag() {
   uint32_t pdecFar = readFar();
-  if (pdecFar != FAR_RESET) {
-    sif::warning << "PdecHandler::resetFarStatFlag: FAR register did not match expected value."
+  if ((pdecFar & FAR_STAT_MASK) != FAR_STAT_MASK) {
+    sif::warning << "PdecHandler::resetFarStatFlag: FAR register stat bit is not set."
                  << " Read value: 0x" << std::hex << static_cast<unsigned int>(pdecFar)
                  << std::endl;
     CURRENT_FAR = pdecFar;

linux/ipcore/PdecHandler.h

@@ -262,7 +262,7 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
    * @brief   This functions writes the configuration parameters to the configuration
    *          section of the PDEC.
    */
-  void writePdecConfig();
+  void writePdecConfigDuringReset(PdecConfig& config);
 
   /**
    * @brief   Reading the FAR resets the set stat flag which signals a new TC. Without clearing

linux/ipcore/pdec.h

@@ -15,6 +15,8 @@ static constexpr uint32_t NEW_FAR_MASK = 1 << 2;
 static constexpr uint32_t TC_ABORT_MASK = 1 << 1;
 static constexpr uint32_t TC_NEW_MASK = 1 << 0;
 
+static constexpr uint32_t FAR_STAT_MASK = 1 << 31;
+
 static const uint32_t FRAME_ANA_MASK = 0x70000000;
 static const uint32_t IREASON_MASK = 0x0E000000;
 

mission/core/GenericFactory.cpp

@@ -80,14 +80,14 @@ void ObjectFactory::produceGenericObjects(HealthTableIF** healthTable_, PusTmFun
   StorageManagerIF* tcStore;
   StorageManagerIF* tmStore;
   {
-    PoolManager::LocalPoolConfig poolCfg = {{200, 16},  {200, 32},   {150, 64},
-                                            {100, 128}, {100, 1024}, {100, 2048}};
+    PoolManager::LocalPoolConfig poolCfg = {{250, 16},  {250, 32},   {250, 64},
+                                            {150, 128}, {120, 1024}, {120, 2048}};
     tcStore = new PoolManager(objects::TC_STORE, poolCfg);
   }
 
   {
-    PoolManager::LocalPoolConfig poolCfg = {{300, 16},  {300, 32},   {100, 64},
-                                            {100, 128}, {100, 1024}, {100, 2048}};
+    PoolManager::LocalPoolConfig poolCfg = {{300, 16},  {300, 32},   {250, 64},
+                                            {150, 128}, {120, 1024}, {120, 2048}};
     tmStore = new PoolManager(objects::TM_STORE, poolCfg);
   }