eive/eive-obsw
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changed all gpio configurations to open by line name
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This commit is contained in:
Jakob Meier
2021-09-25 10:49:03 +02:00
parent 11537f9988
commit 9fd4c477f0
5 changed files with 173 additions and 103 deletions
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25
bsp_q7s/gpio/gpioCallbacks.cpp
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@ -24,31 +24,26 @@ void initSpiCsDecoder(GpioIF* gpioComIF) {
GpioCookie* spiMuxGpios = new GpioCookie;
GpiodRegularByLabel* spiMuxBit = nullptr;
GpiodRegularByLineName* spiMuxBit = nullptr;
/** Setting mux bit 1 to low will disable IC21 on the interface board */
spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_1,
"SPI Mux Bit 1", gpio::OUT, gpio::LOW);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 1",
gpio::OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
/** Setting mux bit 2 to low disables IC1 on the TCS board */
spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_2,
"SPI Mux Bit 2", gpio::OUT, gpio::LOW);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 2", gpio::OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_3,
"SPI Mux Bit 3", gpio::OUT, gpio::LOW);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 3", gpio::OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
/** The following gpios can take arbitrary initial values */
spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_4,
"SPI Mux Bit 4", gpio::OUT, gpio::LOW);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_4_PIN, "SPI Mux Bit 4", gpio::OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit);
spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_5,
"SPI Mux Bit 5", gpio::OUT, gpio::LOW);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_5_PIN, "SPI Mux Bit 5", gpio::OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_5, spiMuxBit);
spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_6,
"SPI Mux Bit 6", gpio::OUT, gpio::LOW);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_6_PIN, "SPI Mux Bit 6", gpio::OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_6, spiMuxBit);
GpiodRegularByLabel* enRwDecoder = new GpiodRegularByLabel(q7s::GPIO_FLEX_OBC1F_B1,
q7s::EN_RW_CS, "EN_RW_CS", gpio::OUT, gpio::HIGH);
GpiodRegularByLineName* enRwDecoder = new GpiodRegularByLineName(q7s::gpioNames::EN_RW_CS,
"EN_RW_CS", gpio::OUT, gpio::HIGH);
spiMuxGpios->addGpio(gpioIds::EN_RW_CS, enRwDecoder);
result = gpioComInterface->addGpios(spiMuxGpios);