eive/eive-obsw
eive/eive-obsw
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possible some fixes in decoder logic
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This commit is contained in:
Robin Müller 2022-02-15 20:40:44 +01:00
parent ce41b3316c
commit f5879f5867
6 changed files with 44 additions and 43 deletions
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12
bsp_q7s/callbacks/gpioCallbacks.cpp
View File

@ -146,15 +146,15 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
break;
}
case (gpioIds::CS_SUS_2): {
disableDecoderInterfaceBoardIc2();
disableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_3): {
disableDecoderInterfaceBoardIc2();
disableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_4): {
disableDecoderInterfaceBoardIc2();
disableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_5): {
@ -162,7 +162,7 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
break;
}
case (gpioIds::CS_SUS_6): {
disableDecoderInterfaceBoardIc1();
disableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_7): {
@ -170,11 +170,11 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
break;
}
case (gpioIds::CS_SUS_8): {
disableDecoderInterfaceBoardIc1();
disableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_9): {
disableDecoderInterfaceBoardIc1();
disableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_10): {

1
bsp_q7s/core/ObjectFactory.cpp
View File

@ -129,6 +129,7 @@ void ObjectFactory::produce(void* args) {
#if BOARD_TE0720 == 0
new CoreController(objects::CORE_CONTROLLER);
gpioCallbacks::disableAllDecoder();
createPcduComponents(gpioComIF);
createRadSensorComponent(gpioComIF);
createSunSensorComponents(gpioComIF, spiComIF);

4
common/config/devConf.h
View File

@ -27,9 +27,9 @@ static constexpr spi::SpiModes DEFAULT_L3G_MODE = spi::SpiModes::MODE_3;
* Some MAX1227 could not be reached with frequencies around 4 MHz. Maybe this is caused by
* the decoder and buffer circuits. Thus frequency is here defined to 1 MHz.
*/
static const uint32_t SUS_MAX1227_SPI_FREQ = 1'000'000;
static const uint32_t SUS_MAX1227_SPI_FREQ = 976'000;
static constexpr uint32_t DEFAULT_MAX_1227_SPEED = 3'900'000;
static constexpr uint32_t DEFAULT_MAX_1227_SPEED = 976'000;
static constexpr spi::SpiModes DEFAULT_MAX_1227_MODE = spi::SpiModes::MODE_3;
static constexpr uint32_t DEFAULT_ADIS16507_SPEED = 976'000;

2
linux/devices/SusHandler.cpp
View File

@ -117,7 +117,7 @@ ReturnValue_t SusHandler::buildCommandFromCommand(DeviceCommandId_t deviceComman
std::memset(cmdBuffer, 0, sizeof(cmdBuffer));
rawPacket = cmdBuffer;
for (uint8_t idx = 0; idx < 6; idx++) {
cmdBuffer[idx * 2] = buildConvByte(ScanModes::N_ONCE, 0, false);
cmdBuffer[idx * 2] = buildConvByte(ScanModes::N_ONCE, idx, false);
cmdBuffer[idx * 2 + 1] = 0;
}
rawPacketLen = SUS::SIZE_READ_EXT_CONVERSIONS;

2
linux/devices/SusHandler.h
View File

@ -77,7 +77,7 @@ class SusHandler : public DeviceHandlerBase {
SUS::SusDataset dataset;
// Read temperature in each alternating communication step when using
// externally clocked mode
ClkModes clkMode = ClkModes::EXT_CLOCKED_WITH_TEMP;
ClkModes clkMode = ClkModes::EXT_CLOCKED;
uint8_t cmdBuffer[SUS::MAX_CMD_SIZE];
ComStates comState = ComStates::IDLE;

66
linux/fsfwconfig/pollingsequence/pollingSequenceFactory.cpp
View File

@ -169,7 +169,7 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
bool addSus5 = false;
bool addSus6 = false;
bool addSus7 = false;
bool addSus8 = false;
bool addSus8 = true;
bool addSus9 = false;
bool addSus10 = false;
bool addSus11 = false;
@ -183,24 +183,24 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
*/
if (addSus0) {
/* Write setup */
thisSequence->addSlot(objects::SUS_0, length * 0.933, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::SUS_0, length * 0.8, DeviceHandlerIF::PERFORM_OPERATION);
// thisSequence->addSlot(objects::SUS_0, length * 0.933, SusHandler::FIRST_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.933, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.933, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.933, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_0, length * 0.933, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_0, length * 0.83, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.86, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.9, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_0, length * 0.85, DeviceHandlerIF::GET_READ);
/* Start ADC conversions */
// thisSequence->addSlot(objects::SUS_0, length * 0.934, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::SUS_0, length * 0.934, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.934, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.934, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_0, length * 0.934, DeviceHandlerIF::GET_READ);
/* Read ADC conversions */
// thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::GET_READ);
// thisSequence->addSlot(objects::SUS_0, length * 0.94, DeviceHandlerIF::SEND_WRITE);
// thisSequence->addSlot(objects::SUS_0, length * 0.94, DeviceHandlerIF::GET_WRITE);
// thisSequence->addSlot(objects::SUS_0, length * 0.94, DeviceHandlerIF::SEND_READ);
// thisSequence->addSlot(objects::SUS_0, length * 0.94, DeviceHandlerIF::GET_READ);
// /* Read ADC conversions */
// // thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::PERFORM_OPERATION);
// thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::SEND_WRITE);
// thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::GET_WRITE);
// thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::SEND_READ);
// thisSequence->addSlot(objects::SUS_0, length * 0.935, DeviceHandlerIF::GET_READ);
}
if (addSus1) {
/* Write setup */
@ -347,24 +347,24 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
if (addSus8) {
/* Write setup */
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::SUS_8, length * 0.9, DeviceHandlerIF::PERFORM_OPERATION);
// thisSequence->addSlot(objects::SUS_8, length * 0.921, SusHandler::FIRST_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.93, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.95, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_8, length * 0.96, DeviceHandlerIF::GET_READ);
/* Start ADC conversions */
// thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::GET_READ);
/* Read ADC conversions from internal FIFO */
// thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::GET_READ);
// thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::SEND_WRITE);
// thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::GET_WRITE);
// thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::SEND_READ);
// thisSequence->addSlot(objects::SUS_8, length * 0.923, DeviceHandlerIF::GET_READ);
// /* Read ADC conversions from internal FIFO */
// // thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::PERFORM_OPERATION);
// thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::SEND_WRITE);
// thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::GET_WRITE);
// thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::SEND_READ);
// thisSequence->addSlot(objects::SUS_8, length * 0.925, DeviceHandlerIF::GET_READ);
}
if (addSus9) {
@ -459,8 +459,8 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
#endif
#if OBSW_ADD_ACS_BOARD == 1 && OBSW_ADD_ACS_HANDLERS == 1
bool enableAside = false;
bool enableBside = true;
bool enableAside = true;
bool enableBside = false;
if (enableAside) {
// A side
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * 0,