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38f435d1ae
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update for new FSFW code
EIVE/eive-obsw/pipeline/head Build started...
EIVE/eive-obsw/pipeline/pr-develop This commit looks good
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2022-09-16 11:43:11 +02:00 |
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4d93368b4c
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fixed for new fsfw
EIVE/eive-obsw/pipeline/pr-develop This commit looks good
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2022-09-14 13:44:43 +02:00 |
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e4d1cdafcc
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various smaller bugfixes
EIVE/eive-obsw/pipeline/pr-develop This commit looks good
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2022-03-22 11:07:31 +01:00 |
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f5c1263dd3
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now it compiles
EIVE/eive-obsw/pipeline/pr-develop This commit looks good
EIVE/eive-obsw/pipeline/head This commit looks good
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2022-02-22 20:47:09 +01:00 |
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e58c375cb9
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moved and refactored sus handler
EIVE/eive-obsw/pipeline/head There was a failure building this commit
EIVE/eive-obsw/pipeline/pr-develop There was a failure building this commit
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2022-02-22 20:34:25 +01:00 |
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6f9a1853ff
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host compiling again
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2021-05-17 16:37:29 +02:00 |
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79a5847b67
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Sus handler complete
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2021-05-12 16:38:20 +02:00 |
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48af7ef0fb
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sus delay implementation
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2021-05-12 13:06:56 +02:00 |
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50d9365702
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changed SusHandler MAX1227 to internal clock mode
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2021-05-10 11:13:39 +02:00 |
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189bdb7c90
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working SUS in externally clocked mode
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2021-05-09 16:48:55 +02:00 |
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07d337c6ad
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this works with q7s and new sus
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2021-05-09 14:39:56 +02:00 |
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95f09469d1
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this works with the old SUS
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2021-05-09 12:09:39 +02:00 |
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6861cd399e
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some tries to get data from max1227 in externally clocked mode
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2021-05-08 22:49:21 +02:00 |
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f4eb5d81ba
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save before making change in spicomif
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2021-05-07 18:48:42 +02:00 |
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931c17e971
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save before implementing SusHandler with chip select
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2021-05-06 18:00:58 +02:00 |
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8d2993f88d
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rad sensor change wip
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2021-05-03 11:59:33 +02:00 |
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