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PL PCDU Preparation + Update for new Devicetree #153

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meierj merged 3 commits from mueller/pl-pcdu-prep into develop 2022-02-25 11:12:10 +01:00
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muellerr commented 2022-02-23 19:26:51 +01:00
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  • GPIO Mux Bits: Changes indexing to go from 0 - 5 instead 1 - 6. Devicetree has to be updated accordingly
  • Added RADFET enable and PL PCDU GPIOs. Devicetree and firmware has to be updated accordingly. Correctness of FPGA GPIO routing was verified
  • Some fixes in decoder logic according to updated truth tables for SUS CS callbacks
  • Extended SPI test class, includes a lot more test code for various SPI devices now
- GPIO Mux Bits: Changes indexing to go from 0 - 5 instead 1 - 6. Devicetree has to be updated accordingly - Added RADFET enable and PL PCDU GPIOs. Devicetree and firmware has to be updated accordingly. Correctness of FPGA GPIO routing was verified - Some fixes in decoder logic according to updated truth tables for SUS CS callbacks - Extended SPI test class, includes a lot more test code for various SPI devices now
muellerr added 1 commit 2022-02-23 19:26:59 +01:00
intermediate PR
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muellerr changed title from intermediate PR to PL PCDU Preparation + Update for new Devicetree 2022-02-23 19:27:42 +01:00
muellerr added this to the v1.9.0 milestone 2022-02-23 19:29:14 +01:00
muellerr requested review from meierj 2022-02-23 19:29:22 +01:00
muellerr added 1 commit 2022-02-24 12:02:33 +01:00
clean up includes
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muellerr added 1 commit 2022-02-24 23:46:07 +01:00
Merge remote-tracking branch 'origin/develop' into mueller/pl-pcdu-prep
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meierj approved these changes 2022-02-25 11:11:56 +01:00
meierj merged commit 9010f58636 into develop 2022-02-25 11:12:10 +01:00
muellerr deleted branch mueller/pl-pcdu-prep 2022-02-25 11:19:53 +01:00
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Reference: eive/eive-obsw#153
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