2021-08-02 20:58:56 +02:00
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#include <fsfw_hal/stm32h7/dma.h>
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2021-07-15 19:27:13 +02:00
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#include <cstddef>
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2022-02-02 10:29:30 +01:00
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#include <cstdint>
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2021-07-13 19:19:25 +02:00
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user_handler_t DMA_1_USER_HANDLERS[8];
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user_args_t DMA_1_USER_ARGS[8];
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user_handler_t DMA_2_USER_HANDLERS[8];
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user_args_t DMA_2_USER_ARGS[8];
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void dma::assignDmaUserHandler(DMAIndexes dma_idx, DMAStreams stream_idx,
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2022-02-02 10:29:30 +01:00
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user_handler_t user_handler, user_args_t user_args) {
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if (dma_idx == DMA_1) {
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DMA_1_USER_HANDLERS[stream_idx] = user_handler;
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DMA_1_USER_ARGS[stream_idx] = user_args;
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} else if (dma_idx == DMA_2) {
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DMA_2_USER_HANDLERS[stream_idx] = user_handler;
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DMA_2_USER_ARGS[stream_idx] = user_args;
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}
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2021-07-13 19:19:25 +02:00
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}
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// The interrupt handlers in the format required for the IRQ vector table
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/* Do not change these function names! They need to be exactly equal to the name of the functions
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defined in the startup_stm32h743xx.s files! */
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2022-02-02 10:29:30 +01:00
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#define GENERIC_DMA_IRQ_HANDLER(DMA_IDX, STREAM_IDX) \
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if (DMA_##DMA_IDX##_USER_HANDLERS[STREAM_IDX] != NULL) { \
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DMA_##DMA_IDX##_USER_HANDLERS[STREAM_IDX](DMA_##DMA_IDX##_USER_ARGS[STREAM_IDX]); \
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return; \
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} \
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Default_Handler()
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extern "C" void DMA1_Stream0_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(1, 0); }
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extern "C" void DMA1_Stream1_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(1, 1); }
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extern "C" void DMA1_Stream2_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(1, 2); }
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extern "C" void DMA1_Stream3_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(1, 3); }
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extern "C" void DMA1_Stream4_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(1, 4); }
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extern "C" void DMA1_Stream5_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(1, 5); }
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extern "C" void DMA1_Stream6_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(1, 6); }
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extern "C" void DMA1_Stream7_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(1, 7); }
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extern "C" void DMA2_Stream0_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(2, 0); }
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extern "C" void DMA2_Stream1_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(2, 1); }
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extern "C" void DMA2_Stream2_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(2, 2); }
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extern "C" void DMA2_Stream3_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(2, 3); }
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extern "C" void DMA2_Stream4_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(2, 4); }
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extern "C" void DMA2_Stream5_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(2, 5); }
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extern "C" void DMA2_Stream6_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(2, 6); }
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extern "C" void DMA2_Stream7_IRQHandler() { GENERIC_DMA_IRQ_HANDLER(2, 7); }
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