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@ -11,8 +11,6 @@ Install
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4. `graphviz`
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4. `graphviz`
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5. `rustup` || Install using your packet manager or alternatively use the rust install script: `curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh` (confirm default toolchain | nightly | complete | modify path variable: yes)
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5. `rustup` || Install using your packet manager or alternatively use the rust install script: `curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh` (confirm default toolchain | nightly | complete | modify path variable: yes)
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6. At last: Satisfy Rust requirements
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6. At last: Satisfy Rust requirements
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```sh
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```sh
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@ -28,8 +26,13 @@ cargo build -Z build-std
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FSBL is the First Stage Boot Loader and prepares the CPU and FPGA configuration for booting up the Second Stage Bootloader and finally the flight software.
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FSBL is the First Stage Boot Loader and prepares the CPU and FPGA configuration for booting up the Second Stage Bootloader and finally the flight software.
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Before building, the correct `ps7_init.[c;h]` and some other configuration files need to be copied into the misc folder of the FSBL. The FSBL will run without this step, but some interfaces might not work as expected.
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These files are specific to the actual hardware used and located in the `bsp_z7/ps7_init` folder. The following examples assumes the zedboard.
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```sh
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```sh
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cd lib/sw_apps/zynq_fsbl/src
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cd lib/sw_apps/zynq_fsbl/src
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cp romeo-obsw/bsp_z7/ps7_init/zedboard/* ../misc/zed/
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make BOARD=zed SHELL=/bin/bash
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make BOARD=zed SHELL=/bin/bash
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```
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```
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@ -1,8 +1,9 @@
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We provide two lwip configurations, bare and xilinx_eth. If the cmake option `ROMEO_Z7_USE_XIL_ETH` is selected, the xilinx_eth variant is used, otherwise the bare variant is used.
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We provide two lwip configurations, bare and xilinx_eth.
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Bare is the bare-metal minimal implementation. It tries to reduce code size and system complexity, using the bare API and a custom networking thread, handling all networking aspects.
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Bare is the bare-metal minimal implementation. It tries to reduce code size and system complexity, using the bare API and a custom networking thread, handling all networking aspects.
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This configuration is meant to be run on the satellite obsw.
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This configuration is meant to be run on the satellite obsw. It is exported as library `lwip`.
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Xilinx_eth supports the xilinx ethernet core of the Zynq PS, inlcuding DMA. Unfortunately, the xilinx drivers require a custom sys_arch port.
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Xilinx_eth supports the xilinx ethernet core of the Zynq PS, inlcuding DMA. Unfortunately, the xilinx drivers require a custom sys_arch port and run a lot of additionals threads. Also, some code seems to be rather improvised. In sum, this code is not considered fit for orbit and kept out of the actual obsw except for special test cases.
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The xilinx_eth configuration is meant to be used with posix compatible calls, using the lwip sockets api and multiple threads running in the background.
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The xilinx_eth configuration is meant to be used with posix compatible calls, using the lwip sockets api.
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This configuration is meant to be run on debugging configurations or support equipment.
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This configuration is mainly used for the simulation interface which relies on an eth interface to communicate with the simulator.
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This code is exported as library `lwip_xil`.
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7
bsp_z7/ps7_init/README.md
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7
bsp_z7/ps7_init/README.md
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`ps7_init.c` is used to initialize the hardware of the Zynq Processor.
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We try to adjust it so that the actual obsw does not need to configure interface parameters (they are fixed in that we know the parameters and they will not change during runtime).
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There might be additional files in the future besides `ps7_init.c`, all of which need to be copied into the ../misc/ folder of the fsbl before compiling.
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As these files are hardware dependent, subfolders for the platforms are provided.
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