forked from ROMEO/obsw
Merge remote-tracking branch 'origin/main' into philipp/docker
This commit is contained in:
74
BUILD_WITH_CMAKE.md
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74
BUILD_WITH_CMAKE.md
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## Requirements:
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### Known Issues
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Ubuntu 22.04 has some version issues with the compile toolchain, consider using a newer version or other distribution or docker. Or solve the issue and add it here.
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### Steps
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1. `cmake`
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2. `arm-none-eabi-gcc arm-none-eabi-gcc arm-none-eabi-binutils arm-none-eabi-gdb arm-none-eabi-newlib`
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3. `doxygen`
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4. `graphviz`
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5. `rustup` || Install using your packet manager or alternatively use the rust install script: `curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh`
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6. At last: Satisfy Rust requirements
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```sh
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cd ../mission_rust
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cargo update
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rustup toolchain install nightly
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rustup component add rust-src --toolchain nightly-x86_64-unknown-linux-gnu
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rustup override set nightly
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cargo build -Z build-std
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```
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## Build the FSBL
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FSBL is the First Stage Boot Loader and prepares the CPU and FPGA configuration for booting up the Second Stage Bootloader and finally the flight software.
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```sh
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cd lib/sw_apps/zynq_fsbl/src
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make BOARD=zed SHELL=/bin/bash
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```
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If you want, copy the fsbl.elf to the docker/compile_fsbl directory for easier access:
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```sh
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cp embeddedsw/lib/sw_apps/zynq_fsbl/src/fsbl.elf .
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```
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## Steps
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## mission_rust
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## obsw
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##### Clone the submodules (FreeRTOS and lwIP):
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```sh
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git submodule init
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git submodule update
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```
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##### To build the obsw, run the following command
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Once:
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```sh
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mkdir -p build
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cd build
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```
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After adding a new .c file:
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```sh
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cmake -DCMAKE_TOOLCHAIN_FILE=../bsp_z7/cmake/arm-none-eabi.toolchain ..
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```
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Every time
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```sh
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make -j 8"
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```
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The romeo-obsw binary can now be found in the `build` directory. The next step to deploy it is here: [DEBUG_ON_ZEDBOARD.md](./DEBUG_ON_ZEDBOARD.md).
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53
DEBUG_ON_ZEDBOARD.md
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53
DEBUG_ON_ZEDBOARD.md
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# Debugging on `zedboard`
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`zedboard` is the `Xilinx Zynq-7000` development board.
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## Requirements [TBC]:
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- `OpenOCD`
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- `arm-none-eabi-gdb`
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## Steps
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TODO: discuss this with paul
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1. Set Zedboard `boot mode` to JTAG and connect debugging PC to zedboard JTAG and UART USB port.
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TODO: what is which port, use distinct name/add a graphic
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2. On PC connected to zedboard JTAG USB port:
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```sh
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openocd -f board/digilent_zedboard.cfg
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```
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If you have one around, load bitstream at startup (go get a coffee, takes time with onboard JTAG, blue LED lights up when done):
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```sh
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openocd -f board/digilent_zedboard.cfg -c "init" -c "pld load 0 system.bit"
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```
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3. To use JTAG Boot for the OBSW, you first need to run the FSBL once.
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On build PC (adapt IP if different from debugging PC) in the folder where you build the FSBL as above:
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```sh
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arm-none-eabi-gdb fsbl.elf
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>target extended-remote localhost:3333
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>load
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>cont
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>^C^D^D
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```
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### (Optional) Automate this run:
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```sh
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arm-none-eabi-gdb fsbl.elf -iex "target extended-remote localhost:3333" -ex "set pagination off" -ex "load" -ex "break FsblHandoffJtagExit" -ex "cont" -ex="set confirm off" -ex "exit"
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```
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It will exit after the Zynq is configured and ready to firmware.
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Then load the actual OBSW, in the build (`build_cli` in the example above) folder run:
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```sh
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arm-none-eabi-gdb romeo-obsw
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>target extended-remote localhost:3333
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>load
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>cont
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```
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Again, `Command Line Interface (CLI) commands` can be moved to the GNU Debugger (DGB) call. Also, a small function is used as marker to return from GDB if the mission code returns (should not happen in production but might be useful during testing).
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```sh
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arm-none-eabi-gdb romeo-obsw -iex "target extended-remote localhost:3333" -ex "set pagination off" -ex "load" -ex "break done" -ex "cont" -ex="set confirm off" -ex "exit"
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```
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UART USB port should output something at `115200baud`, (I use moserial to monitor).
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1
docker/compile_fsbl/.gitignore
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1
docker/compile_fsbl/.gitignore
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embeddedsw
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110
mission/testIp.c
110
mission/testIp.c
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StaticTask_t xTaskBuffer;
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StaticTask_t xTaskBuffer;
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StackType_t xStack[512];
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StackType_t xStack[512];
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void testIp() {
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// void testIp() {
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uartIsrQueue =
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// uartIsrQueue =
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xQueueCreateStatic(QUEUE_LENGTH, 1, ucQueueStorageArea, &xStaticQueue);
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// xQueueCreateStatic(QUEUE_LENGTH, 1, ucQueueStorageArea, &xStaticQueue);
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lwip_init();
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// lwip_init();
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ip4_addr_t slip_addr = {PP_HTONL(LWIP_MAKEU32(10, 0, 0, 32))},
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// ip4_addr_t slip_addr = {PP_HTONL(LWIP_MAKEU32(10, 0, 0, 32))},
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slip_mask = {PP_HTONL(LWIP_MAKEU32(255, 255, 255, 0))},
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// slip_mask = {PP_HTONL(LWIP_MAKEU32(255, 255, 255, 0))},
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slip_gw = {PP_HTONL(LWIP_MAKEU32(10, 0, 0, 1))};
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// slip_gw = {PP_HTONL(LWIP_MAKEU32(10, 0, 0, 1))};
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netif_add(&netif, &slip_addr, &slip_mask, &slip_gw, NULL, slipif_init,
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// netif_add(&netif, &slip_addr, &slip_mask, &slip_gw, NULL, slipif_init,
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netif_input);
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// netif_input);
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netif_set_default(&netif);
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// netif_set_default(&netif);
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// should be done by driver, which does not do it, so we do it here
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// // should be done by driver, which does not do it, so we do it here
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netif_set_link_up(&netif);
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// netif_set_link_up(&netif);
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netif_set_up(&netif);
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// netif_set_up(&netif);
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udpecho_raw_pcb = udp_new_ip_type(IPADDR_TYPE_ANY);
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// udpecho_raw_pcb = udp_new_ip_type(IPADDR_TYPE_ANY);
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if (udpecho_raw_pcb != NULL) {
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// if (udpecho_raw_pcb != NULL) {
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err_t err;
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// err_t err;
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err = udp_bind(udpecho_raw_pcb, IP_ANY_TYPE, 7);
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// err = udp_bind(udpecho_raw_pcb, IP_ANY_TYPE, 7);
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if (err == ERR_OK) {
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// if (err == ERR_OK) {
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udp_recv(udpecho_raw_pcb, udpecho_raw_recv, NULL);
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// udp_recv(udpecho_raw_pcb, udpecho_raw_recv, NULL);
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} else {
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// } else {
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/* TODO */
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// /* TODO */
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}
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// }
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} else {
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// } else {
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/* TODO */
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// /* TODO */
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}
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// }
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/* Install the UART Interrupt handler. */
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// /* Install the UART Interrupt handler. */
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BaseType_t xStatus =
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// BaseType_t xStatus =
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XScuGic_Connect(&xInterruptController, STDIN_INT_NR,
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// XScuGic_Connect(&xInterruptController, STDIN_INT_NR,
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(Xil_ExceptionHandler)handleUARTInt, NULL);
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// (Xil_ExceptionHandler)handleUARTInt, NULL);
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configASSERT(xStatus == XST_SUCCESS);
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// configASSERT(xStatus == XST_SUCCESS);
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(void)xStatus; /* Remove compiler warning if configASSERT() is not defined. */
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// (void)xStatus; /* Remove compiler warning if configASSERT() is not defined. */
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// Set trigger level to 62 of 64 bytes, giving interrupt some time to react
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// // Set trigger level to 62 of 64 bytes, giving interrupt some time to react
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXWM_OFFSET, 62);
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// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXWM_OFFSET, 62);
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// Setting the rx timeout to n*4 -1 bits
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// // Setting the rx timeout to n*4 -1 bits
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXTOUT_OFFSET, 50);
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// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXTOUT_OFFSET, 50);
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// enable UART Interrupts
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// // enable UART Interrupts
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u32 mask = XUARTPS_IXR_RTRIG | XUARTPS_IXR_RXOVR | XUARTPS_IXR_RXFULL |
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// u32 mask = XUARTPS_IXR_RTRIG | XUARTPS_IXR_RXOVR | XUARTPS_IXR_RXFULL |
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XUARTPS_IXR_TOUT;
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// XUARTPS_IXR_TOUT;
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/* Write the mask to the IER Register */
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// /* Write the mask to the IER Register */
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IER_OFFSET, mask);
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// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IER_OFFSET, mask);
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/* Write the inverse of the Mask to the IDR register */
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// /* Write the inverse of the Mask to the IDR register */
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IDR_OFFSET, (~mask));
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// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IDR_OFFSET, (~mask));
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/* Enable the interrupt for the UART1 in the interrupt controller. */
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// /* Enable the interrupt for the UART1 in the interrupt controller. */
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XScuGic_Enable(&xInterruptController, STDIN_INT_NR);
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// XScuGic_Enable(&xInterruptController, STDIN_INT_NR);
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// Start lwip task
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// // Start lwip task
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xTaskCreateStatic(
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// xTaskCreateStatic(
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lwip_main, /* The function that implements the task. */
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// lwip_main, /* The function that implements the task. */
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"lwip", /* The text name assigned to the task - for debug
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// "lwip", /* The text name assigned to the task - for debug
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only as it is not used by the kernel. */
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// only as it is not used by the kernel. */
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stackSizeWords, /* The size of the stack to allocate to the task. */
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// stackSizeWords, /* The size of the stack to allocate to the task. */
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NULL, /* The parameter passed to the task - not used in this
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// NULL, /* The parameter passed to the task - not used in this
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simple case. */
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// simple case. */
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4, /* The priority assigned to the task. */
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// 4, /* The priority assigned to the task. */
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xStack, &xTaskBuffer);
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// xStack, &xTaskBuffer);
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}
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// }
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BIN
romeo_design_from_website.bmp
Normal file
BIN
romeo_design_from_website.bmp
Normal file
Binary file not shown.
After Width: | Height: | Size: 6.0 MiB |
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