forked from ROMEO/obsw
slip working with int driven rx
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5c75cfa63a
commit
8bca815cd2
@ -1,3 +1,4 @@
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add_subdirectory(freeRTOS)
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add_subdirectory(lwip)
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add_subdirectory(ps7_cortexa9_0)
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add_subdirectory(objects)
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1
bsp_z7/lwip/CMakeLists.txt
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1
bsp_z7/lwip/CMakeLists.txt
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@ -0,0 +1 @@
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target_sources(lwip PRIVATE sys_arch_protect.c)
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@ -20,4 +20,12 @@
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#define PACK_STRUCT_END
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#define LWIP_PLATFORM_ASSERT(x)
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#define LWIP_PLATFORM_DIAG(x) do { printf x; } while(0)
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#define LWIP_PLATFORM_DIAG(x) do { printf x; } while(0)
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//overwrite protection function, we need ISR aware one, which the default FreeRTOS port does not support
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#define SYS_ARCH_DECL_PROTECT(lev) uint32_t lev //caution, type is actually sys_prot_t, which is not available here.
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#define SYS_ARCH_PROTECT(lev) lev = sys_arch_protect_ca0()
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#define SYS_ARCH_UNPROTECT(lev) sys_arch_unprotect_ca0(lev)
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uint32_t sys_arch_protect_ca0(void); //caution, type is actually sys_prot_t, which is not available here.
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void sys_arch_unprotect_ca0(uint32_t pval); //caution, type is actually sys_prot_t, which is not available here.
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@ -328,9 +328,17 @@ a lot of data that needs to be copied, this should be set high. */
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#endif /* LWIP_OPTTEST_FILE */
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// FreeRTOS defines
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#define LWIP_FREERTOS_CHECK_CORE_LOCKING 1
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// Disable slip task
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#define SLIP_USE_RX_THREAD 0
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#define SLIP_RX_FROM_ISR 1
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#define SLIP_RX_QUEUE 1
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/* The following defines must be done even in OPTTEST mode: */
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#define LWIP_FREERTOS_CHECK_CORE_LOCKING 1
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void sys_check_core_locking(void);
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@ -339,7 +347,6 @@ void sys_check_core_locking(void);
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void sys_mark_tcpip_thread(void);
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#define LWIP_MARK_TCPIP_THREAD() sys_mark_tcpip_thread()
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// Disable slip task
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#define SLIP_USE_RX_THREAD 0
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#endif /* LWIP_LWIPOPTS_H */
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66
bsp_z7/lwip/sys_arch_protect.c
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66
bsp_z7/lwip/sys_arch_protect.c
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@ -0,0 +1,66 @@
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#include "lwip/sys.h"
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#include "FreeRTOS.h"
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#include "task.h"
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extern volatile uint32_t ulPortInterruptNesting;
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#if SYS_LIGHTWEIGHT_PROT
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sys_prot_t
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sys_arch_protect_ca0(void)
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{
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#if LWIP_FREERTOS_SYS_ARCH_PROTECT_USES_MUTEX
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BaseType_t ret;
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LWIP_ASSERT("sys_arch_protect_mutex != NULL", sys_arch_protect_mutex != NULL);
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ret = xSemaphoreTakeRecursive(sys_arch_protect_mutex, portMAX_DELAY);
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LWIP_ASSERT("sys_arch_protect failed to take the mutex", ret == pdTRUE);
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#else /* LWIP_FREERTOS_SYS_ARCH_PROTECT_USES_MUTEX */
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if ( ulPortInterruptNesting == 0) {
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taskENTER_CRITICAL();
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} else {
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taskENTER_CRITICAL_FROM_ISR();
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}
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#endif /* LWIP_FREERTOS_SYS_ARCH_PROTECT_USES_MUTEX */
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#if LWIP_FREERTOS_SYS_ARCH_PROTECT_SANITY_CHECK
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{
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/* every nested call to sys_arch_protect() returns an increased number */
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sys_prot_t ret = sys_arch_protect_nesting;
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sys_arch_protect_nesting++;
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LWIP_ASSERT("sys_arch_protect overflow", sys_arch_protect_nesting > ret);
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return ret;
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}
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#else
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return 1;
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#endif
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}
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void
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sys_arch_unprotect_ca0(sys_prot_t pval)
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{
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#if LWIP_FREERTOS_SYS_ARCH_PROTECT_USES_MUTEX
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BaseType_t ret;
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#endif
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#if LWIP_FREERTOS_SYS_ARCH_PROTECT_SANITY_CHECK
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LWIP_ASSERT("unexpected sys_arch_protect_nesting", sys_arch_protect_nesting > 0);
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sys_arch_protect_nesting--;
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LWIP_ASSERT("unexpected sys_arch_protect_nesting", sys_arch_protect_nesting == pval);
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#endif
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#if LWIP_FREERTOS_SYS_ARCH_PROTECT_USES_MUTEX
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LWIP_ASSERT("sys_arch_protect_mutex != NULL", sys_arch_protect_mutex != NULL);
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ret = xSemaphoreGiveRecursive(sys_arch_protect_mutex);
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LWIP_ASSERT("sys_arch_unprotect failed to give the mutex", ret == pdTRUE);
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#else /* LWIP_FREERTOS_SYS_ARCH_PROTECT_USES_MUTEX */
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if ( ulPortInterruptNesting == 0) {
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taskEXIT_CRITICAL();
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} else {
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taskEXIT_CRITICAL_FROM_ISR(0);
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}
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#endif /* LWIP_FREERTOS_SYS_ARCH_PROTECT_USES_MUTEX */
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LWIP_UNUSED_ARG(pval);
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}
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#endif /* SYS_LIGHTWEIGHT_PROT */
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@ -15,5 +15,5 @@ void outbyte(char c);
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#endif
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void outbyte(char c) {
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//XUartPs_SendByte(STDOUT_BASEADDRESS, c);
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XUartPs_SendByte(STDOUT_BASEADDRESS, c);
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}
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@ -212,7 +212,7 @@ void mission(void *){
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currPrio = 2;
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PeriodicTaskIF* controllerTask = taskFactory->createPeriodicTask(
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"controller", currPrio, PeriodicTaskIF::MINIMUM_STACK_SIZE, 1, nullptr);
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"controller", currPrio, 1024, 1, nullptr);
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controllerTask->addComponent(123);
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printf("Created Tasks\n");
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@ -9,8 +9,13 @@
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#include <netif/slipif.h>
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#include <sys/socket.h>
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#include <xscugic.h>
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#include <xuartps.h>
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#undef XUARTPS_IXR_RXOVR
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#define XUARTPS_IXR_RXOVR 0x00000020U /**< Rx Overrun error interrupt */
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#define XUARTPS_IXR_RTRIG 0x00000001U /**< RX FIFO trigger interrupt. */
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extern "C" {
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void slipif_rxbyte_input(struct netif *netif, u8_t c);
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@ -18,22 +23,41 @@ void myInitDone(void *arg) { puts("init done"); }
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struct netif netif;
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void pollUart(void *) {
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extern XScuGic xInterruptController; /* Interrupt controller instance */
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/** this is based on XUartPs_InterruptHandler() in xuartps_intr.c*/
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void handleUARTInt(void *) {
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XUartPs_SendByte(STDOUT_BASEADDRESS, 'I');
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u32 IsrStatus;
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/*
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* Read the interrupt ID register to determine which
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* interrupt is active
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*/
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IsrStatus = XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_IMR_OFFSET);
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IsrStatus &= XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_ISR_OFFSET);
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// Onlx RX intterupts are enabled
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// We do not care which interrupt actually triggered, just get all bytes
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// available into the stack
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u32 RecievedByte;
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while (XUartPs_IsReceiveData(STDIN_BASEADDRESS)) {
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RecievedByte = XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_FIFO_OFFSET);
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slipif_received_byte(&netif, (u8)RecievedByte);
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}
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/* Clear the interrupt status. */
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_ISR_OFFSET, IsrStatus);
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}
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void forwardPackets(void *) {
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while (1) {
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if (XUartPs_IsReceiveData(STDIN_BASEADDRESS)) {
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u32 RecievedByte;
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/* Wait until there is data */
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while (XUartPs_IsReceiveData(STDIN_BASEADDRESS)) {
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RecievedByte = XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_FIFO_OFFSET);
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slipif_rxbyte_input(&netif, (u8)RecievedByte);
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}
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}
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vTaskDelay(pdMS_TO_TICKS(5));
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slipif_process_rxqueue(&netif);
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vTaskDelay(pdMS_TO_TICKS(10));
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}
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}
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}
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uint32_t sio_data;
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@ -41,6 +65,8 @@ sio_fd_t sio_open(u8_t devnum) { return &sio_data; }
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void sio_send(u8_t c, sio_fd_t fd) { XUartPs_SendByte(STDOUT_BASEADDRESS, c); }
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} // extern "C"
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void testIp() {
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tcpip_init(myInitDone, nullptr);
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@ -59,14 +85,38 @@ void testIp() {
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vTaskDelay(pdMS_TO_TICKS(2000));
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xTaskCreate(
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pollUart, /* The function that implements the task. */
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"uart", /* The text name assigned to the task - for debug only as it is not used by the
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kernel. */
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2048, /* The size of the stack to allocate to the task. */
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nullptr, /* The parameter passed to the task - not used in this simple case. */
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1, /* The priority assigned to the task. */
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nullptr);
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/* Install the UART Interrupt handler. */
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BaseType_t xStatus =
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XScuGic_Connect(&xInterruptController, XPAR_XUARTPS_1_INTR,
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(Xil_ExceptionHandler)handleUARTInt, nullptr);
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configASSERT(xStatus == XST_SUCCESS);
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(void)xStatus; /* Remove compiler warning if configASSERT() is not defined. */
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// Set trigger level to 62 of 64 bytes, giving interrupt some time to react
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXWM_OFFSET, 62);
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// Setting the rx timeout to n*4 -1 bits
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXTOUT_OFFSET, 50);
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// enable UART Interrupts
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u32 mask = XUARTPS_IXR_RTRIG | XUARTPS_IXR_RXOVR | XUARTPS_IXR_RXFULL | XUARTPS_IXR_TOUT;
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/* Write the mask to the IER Register */
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IER_OFFSET, mask);
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/* Write the inverse of the Mask to the IDR register */
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XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IDR_OFFSET, (~mask));
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/* Enable the interrupt for the UART1 in the interrupt controller. */
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XScuGic_Enable(&xInterruptController, XPAR_XUARTPS_1_INTR);
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// Start task to forwad packets from ISR to IP Task
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xTaskCreate(forwardPackets, /* The function that implements the task. */
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"slip forward", /* The text name assigned to the task - for debug
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only as it is not used by the kernel. */
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1024, /* The size of the stack to allocate to the task. */
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nullptr, /* The parameter passed to the task - not used in this
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simple case. */
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4, /* The priority assigned to the task. */
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nullptr);
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puts("socket");
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