This commit is contained in:
Ulrich Mohr 2024-09-09 17:37:41 +02:00
parent 44ffb09ee9
commit 8fa5cddc23
6 changed files with 20 additions and 16 deletions

View File

@ -54,7 +54,6 @@ void uart0_handle_interrupt(void *) {
} }
void uart1_handle_interrupt(void *) { void uart1_handle_interrupt(void *) {
outbyte('R');
u32 IsrStatus; u32 IsrStatus;
/* /*
@ -73,8 +72,6 @@ void uart1_handle_interrupt(void *) {
while (XUartPs_IsReceiveData(XPS_UART1_BASEADDR)) { while (XUartPs_IsReceiveData(XPS_UART1_BASEADDR)) {
RecievedByte = XUartPs_ReadReg(XPS_UART1_BASEADDR, XUARTPS_FIFO_OFFSET); RecievedByte = XUartPs_ReadReg(XPS_UART1_BASEADDR, XUARTPS_FIFO_OFFSET);
outbyte(RecievedByte);
outbyte(XUartPs_ReadReg(XPS_UART1_BASEADDR, XUARTPS_ISR_OFFSET));
xQueueSendToBackFromISR(uart1_receive_queue, &RecievedByte, xQueueSendToBackFromISR(uart1_receive_queue, &RecievedByte,
&xHigherPriorityTaskWoken); &xHigherPriorityTaskWoken);
} }
@ -83,8 +80,6 @@ void uart1_handle_interrupt(void *) {
/* Clear the interrupt status. */ /* Clear the interrupt status. */
XUartPs_WriteReg(XPS_UART1_BASEADDR, XUARTPS_ISR_OFFSET, IsrStatus); XUartPs_WriteReg(XPS_UART1_BASEADDR, XUARTPS_ISR_OFFSET, IsrStatus);
outbyte('X');
outbyte('\n');
/* directly yield if sending to the queue woke something in ourselves */ /* directly yield if sending to the queue woke something in ourselves */
portYIELD_FROM_ISR(xHigherPriorityTaskWoken); portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
} }

View File

@ -498,8 +498,6 @@ void setup_rx_bds(xemacpsif_s *xemacpsif, XEmacPs_BdRing *rxring)
void emacps_recv_handler(void *arg) void emacps_recv_handler(void *arg)
{ {
outbyte('D');
struct pbuf *p; struct pbuf *p;
XEmacPs_Bd *rxbdset, *curbdptr; XEmacPs_Bd *rxbdset, *curbdptr;
struct xemac_s *xemac; struct xemac_s *xemac;
@ -587,7 +585,6 @@ void emacps_recv_handler(void *arg)
sys_sem_signal(&xemac->sem_rx_data_available); sys_sem_signal(&xemac->sem_rx_data_available);
xInsideISR--; xInsideISR--;
#endif #endif
outbyte('M');
return; return;
} }

View File

@ -65,9 +65,9 @@ int main(void) {
// printf("Booting Software\n"); // printf("Booting Software\n");
testEth(); // testEth();
//mission(); mission();
} }
static void prvSetupHardware(void) { static void prvSetupHardware(void) {

View File

@ -22,7 +22,7 @@ int _write(int fd, const char *ptr, int len) {
return -1; // TODO error return -1; // TODO error
} }
// we only support a single debug UART, so // we only support a single debug UART, so
// stdout and stderr are the same and go to the xiling stdout UART // stdout and stderr are the same and go to the xilinx stdout UART
// We output directely to avoid loops and allow debugging (not via a write) // We output directely to avoid loops and allow debugging (not via a write)
if (fd < 3) { if (fd < 3) {
int todo; int todo;

View File

@ -94,7 +94,7 @@ void udp_echo_thread(void *_) {
uint16_t port = ntohs(peer_addr.sin_port); uint16_t port = ntohs(peer_addr.sin_port);
switch (port) { switch (port) {
case 8100: case 8100:
xil_printf("udp rec 8100 len: %i\n", ret); // xil_printf("udp rec 8100 len: %i\n", ret);
write(uart0_fd, rec_buffer, ret); write(uart0_fd, rec_buffer, ret);
break; break;
case 8101: case 8101:
@ -119,7 +119,7 @@ void udp_echo_thread(void *_) {
sizeof(peer_addr)); sizeof(peer_addr));
} else if (readable == uart0_receive_queue) { } else if (readable == uart0_receive_queue) {
ret = read(uart0_fd, rec_buffer, sizeof(rec_buffer)); ret = read(uart0_fd, rec_buffer, sizeof(rec_buffer));
xil_printf("uart got %i\n", ret); // xil_printf("uart got %i\n", ret);
// Do not send empty packets // Do not send empty packets
if (ret <= 0) { if (ret <= 0) {

View File

@ -14,13 +14,25 @@ void rust_main();
void test_hardware() { void test_hardware() {
int fd0 = hw_device_open("uart0", 5); int fd0 = hw_device_open("uart0", 5);
write(fd0, "uart0\n", 6); write(fd0, "UART0\n", 6);
int fd1 = hw_device_open("uart1", 5); int fd1 = hw_device_open("uart1", 5);
write(fd1, "uart1\n", 6); write(fd1, "uart1\n", 6);
vTaskDelay(1 / portTICK_PERIOD_MS);
uint8_t buffer[100];
uint8_t buffer[255];
// for (int i = 0; i< sizeof(buffer); i++) {
// buffer[i] = i;
// }
// write(fd0, buffer, sizeof(buffer));
vTaskDelay(10 / portTICK_PERIOD_MS);
write(1, "got:\n", 5);
int read_bytes = read(fd0, buffer, sizeof(buffer)); int read_bytes = read(fd0, buffer, sizeof(buffer));
write(1, buffer, read_bytes); write(1, buffer, read_bytes);
read_bytes = read(fd1, buffer, sizeof(buffer)); read_bytes = read(fd1, buffer, sizeof(buffer));