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5ad8853fef
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uart1 IO
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2024-08-29 14:48:16 +02:00 |
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8e7424bb2f
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io interface; relying on patched lwip
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2024-08-26 23:03:38 +02:00 |
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ee06c79bf4
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xilinx eth in own folder. found another bug/challenge with dma
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2024-08-26 12:03:31 +02:00 |
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8497fe754c
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cleanup
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2024-08-23 12:06:35 +02:00 |
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ae47ca8291
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found it. DMA can obviously not handle fragmented pbufs to receive packets. -> debug cleanup needed
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2024-08-22 18:14:51 +02:00 |
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497e380860
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RX working, still a bit messy
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2024-08-20 22:38:02 +02:00 |
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6c556b8fbf
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better, not done
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2024-08-20 15:13:03 +02:00 |
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2d8d8aeb0a
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working on RX, broke FreeRTOS
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2024-08-20 11:26:27 +02:00 |
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910553df45
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added xilinx lwip drivers, outgoing is working incoming TODO
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2024-08-19 16:52:10 +02:00 |
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701d3dca7f
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lwip without any alloc and sending and receiving UDP via slip
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2023-11-03 17:08:59 +01:00 |
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450eeede33
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lwip is back (using printf with malloc, but apart from that static)
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2023-11-03 11:58:56 +01:00 |
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1eb406074c
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thread safety in newlib, newer lwip, optimized ISR for UART, some more stuff
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2023-10-06 17:29:07 +02:00 |
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8bca815cd2
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slip working with int driven rx
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2023-09-28 18:03:02 +02:00 |
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5c75cfa63a
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lwip both directions working
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2023-09-26 12:46:24 +02:00 |
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3697705319
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removed features from ip stack that crash ip stack
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2023-09-25 14:27:23 +02:00 |
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69e14e14cf
|
ip over slip outgoing works
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2023-09-22 16:38:05 +02:00 |
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2b6a8a501b
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WIP
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2023-09-21 18:02:13 +02:00 |
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