2021-11-20 23:57:08 +01:00
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//! SPI example application
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#![no_main]
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#![no_std]
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use core::cell::RefCell;
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use cortex_m_rt::entry;
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use embedded_hal::spi::{Mode, MODE_0};
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use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use va108xx_hal::{
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gpio::{PinsA, PinsB},
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pac::{self, SPIA, SPIB},
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prelude::*,
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2021-12-02 12:03:46 +01:00
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spi::{self, Spi, SpiBase, TransferConfig},
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2021-11-20 23:57:08 +01:00
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timer::CountDownTimer,
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};
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#[derive(PartialEq, Debug)]
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pub enum ExampleSelect {
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// Enter loopback mode. It is not necessary to tie MOSI/MISO together for this
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Loopback,
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// Send a test buffer and print everything received
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TestBuffer,
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}
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#[derive(PartialEq, Debug)]
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pub enum SpiBusSelect {
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SpiAPortA,
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SpiAPortB,
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SpiBPortB,
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}
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2021-11-21 00:20:35 +01:00
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const EXAMPLE_SEL: ExampleSelect = ExampleSelect::TestBuffer;
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2021-11-20 23:57:08 +01:00
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const SPI_BUS_SEL: SpiBusSelect = SpiBusSelect::SpiBPortB;
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const SPI_SPEED_KHZ: u32 = 1000;
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const SPI_MODE: Mode = MODE_0;
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2021-11-21 00:20:35 +01:00
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const BLOCKMODE: bool = true;
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2021-11-20 23:57:08 +01:00
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#[entry]
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fn main() -> ! {
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rtt_init_print!();
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rprintln!("-- VA108xx SPI example application--");
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let mut dp = pac::Peripherals::take().unwrap();
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let spia_ref: RefCell<Option<SpiBase<SPIA, u8>>> = RefCell::new(None);
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let spib_ref: RefCell<Option<SpiBase<SPIB, u8>>> = RefCell::new(None);
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2021-11-21 00:20:35 +01:00
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let pinsa = PinsA::new(&mut dp.SYSCONFIG, None, dp.PORTA);
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let pinsb = PinsB::new(&mut dp.SYSCONFIG, Some(dp.IOCONFIG), dp.PORTB);
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2021-11-20 23:57:08 +01:00
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let mut spi_cfg = spi::SpiConfig::default();
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if EXAMPLE_SEL == ExampleSelect::Loopback {
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spi_cfg = spi_cfg.loopback(true)
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}
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2021-11-21 00:20:35 +01:00
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// Set up the SPI peripheral
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2021-11-20 23:57:08 +01:00
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match SPI_BUS_SEL {
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SpiBusSelect::SpiAPortA => {
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let (sck, mosi, miso) = (
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pinsa.pa31.into_funsel_1(),
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pinsa.pa30.into_funsel_1(),
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pinsa.pa29.into_funsel_1(),
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);
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spia_ref.borrow_mut().replace(
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Spi::spia(
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dp.SPIA,
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(sck, miso, mosi),
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50.mhz(),
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spi_cfg,
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Some(&mut dp.SYSCONFIG),
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None,
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)
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.downgrade(),
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);
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}
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SpiBusSelect::SpiAPortB => {
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let (sck, mosi, miso) = (
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pinsb.pb9.into_funsel_2(),
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pinsb.pb8.into_funsel_2(),
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pinsb.pb7.into_funsel_2(),
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);
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spia_ref.borrow_mut().replace(
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Spi::spia(
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dp.SPIA,
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(sck, miso, mosi),
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50.mhz(),
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spi_cfg,
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Some(&mut dp.SYSCONFIG),
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None,
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)
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.downgrade(),
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);
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}
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SpiBusSelect::SpiBPortB => {
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let (sck, mosi, miso) = (
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pinsb.pb5.into_funsel_1(),
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pinsb.pb4.into_funsel_1(),
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pinsb.pb3.into_funsel_1(),
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);
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spib_ref.borrow_mut().replace(
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Spi::spib(
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dp.SPIB,
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(sck, miso, mosi),
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50.mhz(),
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spi_cfg,
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Some(&mut dp.SYSCONFIG),
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None,
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)
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.downgrade(),
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);
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}
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}
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// Configure transfer specific properties here
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match SPI_BUS_SEL {
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SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
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if let Some(ref mut spi) = *spia_ref.borrow_mut() {
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let transfer_cfg = TransferConfig::new_no_hw_cs(
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SPI_SPEED_KHZ.khz().into(),
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SPI_MODE,
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BLOCKMODE,
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false,
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);
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spi.cfg_transfer(&transfer_cfg);
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}
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}
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SpiBusSelect::SpiBPortB => {
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if let Some(ref mut spi) = *spib_ref.borrow_mut() {
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let hw_cs_pin = pinsb.pb2.into_funsel_1();
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let transfer_cfg = TransferConfig::new(
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SPI_SPEED_KHZ.khz().into(),
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SPI_MODE,
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Some(hw_cs_pin),
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BLOCKMODE,
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false,
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);
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spi.cfg_transfer(&transfer_cfg);
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}
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}
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}
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// Application logic
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2021-12-05 22:57:54 +01:00
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let mut delay_tim = CountDownTimer::new(&mut dp.SYSCONFIG, 50.mhz().into(), dp.TIM1);
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loop {
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match SPI_BUS_SEL {
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SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
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if let Some(ref mut spi) = *spia_ref.borrow_mut() {
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if EXAMPLE_SEL == ExampleSelect::Loopback {
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nb::block!(spi.send(0x42_u8)).unwrap();
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let word = nb::block!(spi.read()).unwrap();
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assert_eq!(word, 0x42);
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delay_tim.delay_ms(500_u32);
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let mut send_buf: [u8; 3] = [0x03, 0x02, 0x01];
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let reply = spi.transfer(&mut send_buf).unwrap();
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rprintln!("Received reply: {}, {}, {}", reply[0], reply[1], reply[2]);
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assert_eq!(reply, &[0x03, 0x02, 0x01]);
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delay_tim.delay_ms(500_u32);
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} else {
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let mut send_buf: [u8; 3] = [0x01, 0x02, 0x03];
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let reply = spi.transfer(&mut send_buf).unwrap();
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rprintln!("Received reply: {}, {}, {}", reply[0], reply[1], reply[2]);
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delay_tim.delay_ms(1000_u32);
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}
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}
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}
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SpiBusSelect::SpiBPortB => {
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if let Some(ref mut spi) = *spib_ref.borrow_mut() {
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if EXAMPLE_SEL == ExampleSelect::Loopback {
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nb::block!(spi.send(0x42_u8)).unwrap();
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let word = nb::block!(spi.read()).unwrap();
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assert_eq!(word, 0x42);
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delay_tim.delay_ms(500_u32);
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let mut send_buf: [u8; 3] = [0x03, 0x02, 0x01];
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let reply = spi.transfer(&mut send_buf).unwrap();
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rprintln!("Received reply: {}, {}, {}", reply[0], reply[1], reply[2]);
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assert_eq!(reply, &[0x03, 0x02, 0x01]);
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delay_tim.delay_ms(500_u32);
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} else {
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let mut send_buf: [u8; 3] = [0x01, 0x02, 0x03];
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let reply = spi.transfer(&mut send_buf).unwrap();
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rprintln!("Received reply: {}, {}, {}", reply[0], reply[1], reply[2]);
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delay_tim.delay_ms(1000_u32);
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}
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}
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}
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}
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}
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}
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