Rust/va108xx-hal/pipeline/head This commit looks goodDetails
- Important bugfix in UART: use `modify` instead of `write` when enabling
or disabling TX or RX
- Extend RTIC example application. Reply handling is dispatched to lower
priority interrupt
- Adds the IRQ interface to configure interrupts on output and input pins
- Moved the `FilterClkSel` struct to the `clock` module, reexporting in `gpio`
- Added function to set clock divisor registers
- Clearing output state at initialization of Output pins
- Added utility function to set up millisecond timer
- The GPIO module uses type-level programming now
- Implementation heavily based on the ATSAMD GPIO HAL:
https://docs.rs/atsamd-hal/0.13.0/atsamd_hal/gpio/v2/index.html
- Changes to API, but no passing of peripheral references necessary
anymore. All examples and tests updated accordingly