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5f6914a93a
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v0.4.3
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659b7e8f27 |
8
.github/workflows/ci.yml
vendored
8
.github/workflows/ci.yml
vendored
@ -16,14 +16,11 @@ jobs:
|
|||||||
override: true
|
override: true
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||||||
- uses: actions-rs/cargo@v1
|
- uses: actions-rs/cargo@v1
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||||||
with:
|
with:
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||||||
use-cross: true
|
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command: check
|
command: check
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args: --target thumbv6m-none-eabi
|
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- uses: actions-rs/cargo@v1
|
- uses: actions-rs/cargo@v1
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||||||
with:
|
with:
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use-cross: true
|
|
||||||
command: check
|
command: check
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||||||
args: --examples --target thumbv6m-none-eabi
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args: --examples
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||||||
|
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||||||
fmt:
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fmt:
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name: Rustfmt
|
name: Rustfmt
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||||||
@ -55,9 +52,8 @@ jobs:
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- run: rustup component add clippy
|
- run: rustup component add clippy
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||||||
- uses: actions-rs/cargo@v1
|
- uses: actions-rs/cargo@v1
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||||||
with:
|
with:
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use-cross: true
|
|
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command: clippy
|
command: clippy
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||||||
args: --target thumbv6m-none-eabi -- -D warnings
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args: -- -D warnings
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||||||
|
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||||||
ci:
|
ci:
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if: ${{ success() }}
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if: ${{ success() }}
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||||||
|
32
CHANGELOG.md
32
CHANGELOG.md
@ -6,6 +6,38 @@ All notable changes to this project will be documented in this file.
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|||||||
The format is based on [Keep a Changelog](http://keepachangelog.com/)
|
The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
|
and this project adheres to [Semantic Versioning](http://semver.org/).
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|
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|
## [unreleased]
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||||||
|
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|
## [v0.4.3]
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|
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|
- Various smaller fixes for READMEs, update of links in documentation
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|
- Simplified CI for github, do not use `cross`
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|
- New `blinky-pac` example
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|
- Use HAL delay in `blinky` example
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|
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|
## [v0.4.2]
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|
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||||||
|
### Added
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||||||
|
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||||||
|
- `port_mux` function to set pin function select manually
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||||||
|
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||||||
|
### Changed
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||||||
|
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||||||
|
- Clear TX and RX FIFO in SPI transfer function
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|
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||||||
|
## [v0.4.1]
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||||||
|
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||||||
|
### Fixed
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||||||
|
|
||||||
|
- Initial blockmode setting was not set in SPI constructor
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||||||
|
|
||||||
|
## [v0.4.0]
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|
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||||||
|
### Changed
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||||||
|
|
||||||
|
- Replaced `Hertz` by `impl Into<Hertz>` completely and removed
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|
`+ Copy` where not necessary
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|
|
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## [v0.3.1]
|
## [v0.3.1]
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|
|
||||||
- Updated all links to point to new repository
|
- Updated all links to point to new repository
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|
10
Cargo.toml
10
Cargo.toml
@ -1,6 +1,6 @@
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[package]
|
[package]
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name = "va108xx-hal"
|
name = "va108xx-hal"
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version = "0.3.1"
|
version = "0.4.3"
|
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authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
|
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
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edition = "2021"
|
edition = "2021"
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description = "HAL for the Vorago VA108xx family of microcontrollers"
|
description = "HAL for the Vorago VA108xx family of microcontrollers"
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@ -36,10 +36,16 @@ debug = true
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lto = false
|
lto = false
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|
|
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[profile.release]
|
[profile.release]
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lto = true
|
# Problematic because RTT won't work
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|
lto = false
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debug = true
|
debug = true
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opt-level = "s"
|
opt-level = "s"
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||||||
|
|
||||||
|
# Commented until named-profiles feature is stabilized
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|
# [profile.release-lto]
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|
# inherits = "release"
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||||||
|
# lto = true
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||||||
|
|
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[[example]]
|
[[example]]
|
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name = "timer-ticks"
|
name = "timer-ticks"
|
||||||
required-features = ["rt"]
|
required-features = ["rt"]
|
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|
@ -85,4 +85,4 @@ is contained within the
|
|||||||
|
|
||||||
7. Flashing the board might work differently for different boards and there is usually
|
7. Flashing the board might work differently for different boards and there is usually
|
||||||
more than one way. You can find example instructions for the REB1 development board
|
more than one way. You can find example instructions for the REB1 development board
|
||||||
[here](https://github.com/robamu-org/vorago-reb1-rs).
|
[here](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1).
|
||||||
|
47
examples/blinky-pac.rs
Normal file
47
examples/blinky-pac.rs
Normal file
@ -0,0 +1,47 @@
|
|||||||
|
//! Blinky examples using only the PAC
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|
//!
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||||||
|
//! Additional note on LEDs:
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||||||
|
//! Pulling the GPIOs low makes the LEDs blink. See REB1
|
||||||
|
//! schematic for more details.
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|
#![no_main]
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|
#![no_std]
|
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|
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|
use cortex_m_rt::entry;
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|
use panic_halt as _;
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|
use va108xx as pac;
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|
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|
// REB LED pin definitions. All on port A
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|
const LED_D2: u32 = 1 << 10;
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|
const LED_D3: u32 = 1 << 7;
|
||||||
|
const LED_D4: u32 = 1 << 6;
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||||||
|
|
||||||
|
#[entry]
|
||||||
|
fn main() -> ! {
|
||||||
|
let dp = pac::Peripherals::take().unwrap();
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||||||
|
// Enable all peripheral clocks
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||||||
|
dp.SYSCONFIG
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||||||
|
.peripheral_clk_enable
|
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|
.modify(|_, w| unsafe { w.bits(0xffffffff) });
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|
dp.PORTA
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|
.dir()
|
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|
.modify(|_, w| unsafe { w.bits(LED_D2 | LED_D3 | LED_D4) });
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|
dp.PORTA
|
||||||
|
.datamask()
|
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|
.modify(|_, w| unsafe { w.bits(LED_D2 | LED_D3 | LED_D4) });
|
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|
for _ in 0..10 {
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|
dp.PORTA
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||||||
|
.clrout()
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||||||
|
.write(|w| unsafe { w.bits(LED_D2 | LED_D3 | LED_D4) });
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|
cortex_m::asm::delay(5_000_000);
|
||||||
|
dp.PORTA
|
||||||
|
.setout()
|
||||||
|
.write(|w| unsafe { w.bits(LED_D2 | LED_D3 | LED_D4) });
|
||||||
|
cortex_m::asm::delay(5_000_000);
|
||||||
|
}
|
||||||
|
loop {
|
||||||
|
dp.PORTA
|
||||||
|
.togout()
|
||||||
|
.write(|w| unsafe { w.bits(LED_D2 | LED_D3 | LED_D4) });
|
||||||
|
cortex_m::asm::delay(25_000_000);
|
||||||
|
}
|
||||||
|
}
|
@ -9,7 +9,7 @@
|
|||||||
use cortex_m_rt::entry;
|
use cortex_m_rt::entry;
|
||||||
use embedded_hal::digital::v2::ToggleableOutputPin;
|
use embedded_hal::digital::v2::ToggleableOutputPin;
|
||||||
use panic_halt as _;
|
use panic_halt as _;
|
||||||
use va108xx_hal::{gpio::PinsA, pac, prelude::*};
|
use va108xx_hal::{gpio::PinsA, pac, prelude::*, timer::set_up_ms_timer};
|
||||||
|
|
||||||
#[entry]
|
#[entry]
|
||||||
fn main() -> ! {
|
fn main() -> ! {
|
||||||
@ -18,22 +18,29 @@ fn main() -> ! {
|
|||||||
let mut led1 = porta.pa10.into_push_pull_output();
|
let mut led1 = porta.pa10.into_push_pull_output();
|
||||||
let mut led2 = porta.pa7.into_push_pull_output();
|
let mut led2 = porta.pa7.into_push_pull_output();
|
||||||
let mut led3 = porta.pa6.into_push_pull_output();
|
let mut led3 = porta.pa6.into_push_pull_output();
|
||||||
|
let mut delay = set_up_ms_timer(
|
||||||
|
&mut dp.SYSCONFIG,
|
||||||
|
&mut dp.IRQSEL,
|
||||||
|
50.mhz().into(),
|
||||||
|
dp.TIM0,
|
||||||
|
pac::Interrupt::OC0,
|
||||||
|
);
|
||||||
for _ in 0..10 {
|
for _ in 0..10 {
|
||||||
led1.set_low().ok();
|
led1.set_low().ok();
|
||||||
led2.set_low().ok();
|
led2.set_low().ok();
|
||||||
led3.set_low().ok();
|
led3.set_low().ok();
|
||||||
cortex_m::asm::delay(5_000_000);
|
delay.delay_ms(200_u16);
|
||||||
led1.set_high().ok();
|
led1.set_high().ok();
|
||||||
led2.set_high().ok();
|
led2.set_high().ok();
|
||||||
led3.set_high().ok();
|
led3.set_high().ok();
|
||||||
cortex_m::asm::delay(5_000_000);
|
delay.delay_ms(200_u16);
|
||||||
}
|
}
|
||||||
loop {
|
loop {
|
||||||
led1.toggle().ok();
|
led1.toggle().ok();
|
||||||
cortex_m::asm::delay(5_000_000);
|
delay.delay_ms(200_u16);
|
||||||
led2.toggle().ok();
|
led2.toggle().ok();
|
||||||
cortex_m::asm::delay(5_000_000);
|
delay.delay_ms(200_u16);
|
||||||
led3.toggle().ok();
|
led3.toggle().ok();
|
||||||
cortex_m::asm::delay(5_000_000);
|
delay.delay_ms(200_u16);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -114,12 +114,8 @@ fn main() -> ! {
|
|||||||
match SPI_BUS_SEL {
|
match SPI_BUS_SEL {
|
||||||
SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
|
SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
|
||||||
if let Some(ref mut spi) = *spia_ref.borrow_mut() {
|
if let Some(ref mut spi) = *spia_ref.borrow_mut() {
|
||||||
let transfer_cfg = TransferConfig::new_no_hw_cs(
|
let transfer_cfg =
|
||||||
SPI_SPEED_KHZ.khz().into(),
|
TransferConfig::new_no_hw_cs(SPI_SPEED_KHZ.khz(), SPI_MODE, BLOCKMODE, false);
|
||||||
SPI_MODE,
|
|
||||||
BLOCKMODE,
|
|
||||||
false,
|
|
||||||
);
|
|
||||||
spi.cfg_transfer(&transfer_cfg);
|
spi.cfg_transfer(&transfer_cfg);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -127,7 +123,7 @@ fn main() -> ! {
|
|||||||
if let Some(ref mut spi) = *spib_ref.borrow_mut() {
|
if let Some(ref mut spi) = *spib_ref.borrow_mut() {
|
||||||
let hw_cs_pin = pinsb.pb2.into_funsel_1();
|
let hw_cs_pin = pinsb.pb2.into_funsel_1();
|
||||||
let transfer_cfg = TransferConfig::new(
|
let transfer_cfg = TransferConfig::new(
|
||||||
SPI_SPEED_KHZ.khz().into(),
|
SPI_SPEED_KHZ.khz(),
|
||||||
SPI_MODE,
|
SPI_MODE,
|
||||||
Some(hw_cs_pin),
|
Some(hw_cs_pin),
|
||||||
BLOCKMODE,
|
BLOCKMODE,
|
||||||
|
@ -25,7 +25,7 @@ fn main() -> ! {
|
|||||||
(tx, rx),
|
(tx, rx),
|
||||||
115200.bps(),
|
115200.bps(),
|
||||||
&mut dp.SYSCONFIG,
|
&mut dp.SYSCONFIG,
|
||||||
50.mhz().into(),
|
50.mhz(),
|
||||||
);
|
);
|
||||||
let (mut tx, mut rx) = uartb.split();
|
let (mut tx, mut rx) = uartb.split();
|
||||||
writeln!(tx, "Hello World\r").unwrap();
|
writeln!(tx, "Hello World\r").unwrap();
|
||||||
|
@ -57,14 +57,17 @@
|
|||||||
//! operation, the trait functions will return
|
//! operation, the trait functions will return
|
||||||
//! [`InvalidPinType`](PinError::InvalidPinType).
|
//! [`InvalidPinType`](PinError::InvalidPinType).
|
||||||
|
|
||||||
use super::pins::{
|
use super::{
|
||||||
|
pins::{
|
||||||
common_reg_if_functions, FilterType, InterruptEdge, InterruptLevel, Pin, PinError, PinId,
|
common_reg_if_functions, FilterType, InterruptEdge, InterruptLevel, Pin, PinError, PinId,
|
||||||
PinMode, PinState,
|
PinMode, PinState,
|
||||||
|
},
|
||||||
|
reg::RegisterInterface,
|
||||||
};
|
};
|
||||||
use super::reg::RegisterInterface;
|
|
||||||
use crate::{
|
use crate::{
|
||||||
clock::FilterClkSel,
|
clock::FilterClkSel,
|
||||||
pac::{self, IRQSEL, SYSCONFIG},
|
pac::{self, IRQSEL, SYSCONFIG},
|
||||||
|
utility::Funsel,
|
||||||
};
|
};
|
||||||
use embedded_hal::digital::v2::{InputPin, OutputPin, ToggleableOutputPin};
|
use embedded_hal::digital::v2::{InputPin, OutputPin, ToggleableOutputPin};
|
||||||
use paste::paste;
|
use paste::paste;
|
||||||
@ -98,13 +101,7 @@ pub enum DynOutput {
|
|||||||
ReadableOpenDrain,
|
ReadableOpenDrain,
|
||||||
}
|
}
|
||||||
|
|
||||||
/// Value-level `enum` for alternate peripheral function configurations
|
pub type DynAlternate = Funsel;
|
||||||
#[derive(PartialEq, Eq, Clone, Copy)]
|
|
||||||
pub enum DynAlternate {
|
|
||||||
Funsel1,
|
|
||||||
Funsel2,
|
|
||||||
Funsel3,
|
|
||||||
}
|
|
||||||
|
|
||||||
//==================================================================================================
|
//==================================================================================================
|
||||||
// DynPinMode
|
// DynPinMode
|
||||||
|
@ -60,18 +60,7 @@ impl From<DynPinMode> for ModeFields {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
Alternate(config) => {
|
Alternate(config) => {
|
||||||
use dynpins::DynAlternate::*;
|
fields.funsel = config as u8;
|
||||||
match config {
|
|
||||||
Funsel1 => {
|
|
||||||
fields.funsel = 1;
|
|
||||||
}
|
|
||||||
Funsel2 => {
|
|
||||||
fields.funsel = 2;
|
|
||||||
}
|
|
||||||
Funsel3 => {
|
|
||||||
fields.funsel = 3;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
fields
|
fields
|
||||||
|
10
src/i2c.rs
10
src/i2c.rs
@ -2,7 +2,7 @@
|
|||||||
//!
|
//!
|
||||||
//! ## Examples
|
//! ## Examples
|
||||||
//!
|
//!
|
||||||
//! - [REB1 I2C temperature sensor example](https://github.com/robamu-org/vorago-reb1-rs/blob/main/examples/temp-sensor.rs)
|
//! - [REB1 I2C temperature sensor example](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/examples/adt75-temp-sensor.rs)
|
||||||
use crate::{
|
use crate::{
|
||||||
clock::{enable_peripheral_clock, PeripheralClocks},
|
clock::{enable_peripheral_clock, PeripheralClocks},
|
||||||
pac::{I2CA, I2CB, SYSCONFIG},
|
pac::{I2CA, I2CB, SYSCONFIG},
|
||||||
@ -231,7 +231,7 @@ macro_rules! i2c_base {
|
|||||||
impl I2cBase<$I2CX> {
|
impl I2cBase<$I2CX> {
|
||||||
pub fn $i2cx(
|
pub fn $i2cx(
|
||||||
i2c: $I2CX,
|
i2c: $I2CX,
|
||||||
sys_clk: impl Into<Hertz> + Copy,
|
sys_clk: impl Into<Hertz>,
|
||||||
speed_mode: I2cSpeed,
|
speed_mode: I2cSpeed,
|
||||||
ms_cfg: Option<&MasterConfig>,
|
ms_cfg: Option<&MasterConfig>,
|
||||||
sl_cfg: Option<&SlaveConfig>,
|
sl_cfg: Option<&SlaveConfig>,
|
||||||
@ -740,7 +740,7 @@ macro_rules! i2c_slave {
|
|||||||
fn $i2cx_slave(
|
fn $i2cx_slave(
|
||||||
i2c: $I2CX,
|
i2c: $I2CX,
|
||||||
cfg: SlaveConfig,
|
cfg: SlaveConfig,
|
||||||
sys_clk: impl Into<Hertz> + Copy,
|
sys_clk: impl Into<Hertz>,
|
||||||
speed_mode: I2cSpeed,
|
speed_mode: I2cSpeed,
|
||||||
sys_cfg: Option<&mut SYSCONFIG>,
|
sys_cfg: Option<&mut SYSCONFIG>,
|
||||||
) -> Self {
|
) -> Self {
|
||||||
@ -897,7 +897,7 @@ macro_rules! i2c_slave {
|
|||||||
pub fn i2ca(
|
pub fn i2ca(
|
||||||
i2c: $I2CX,
|
i2c: $I2CX,
|
||||||
cfg: SlaveConfig,
|
cfg: SlaveConfig,
|
||||||
sys_clk: impl Into<Hertz> + Copy,
|
sys_clk: impl Into<Hertz>,
|
||||||
speed_mode: I2cSpeed,
|
speed_mode: I2cSpeed,
|
||||||
sys_cfg: Option<&mut SYSCONFIG>,
|
sys_cfg: Option<&mut SYSCONFIG>,
|
||||||
) -> Result<Self, Error> {
|
) -> Result<Self, Error> {
|
||||||
@ -912,7 +912,7 @@ macro_rules! i2c_slave {
|
|||||||
pub fn $i2cx(
|
pub fn $i2cx(
|
||||||
i2c: $I2CX,
|
i2c: $I2CX,
|
||||||
cfg: SlaveConfig,
|
cfg: SlaveConfig,
|
||||||
sys_clk: impl Into<Hertz> + Copy,
|
sys_clk: impl Into<Hertz>,
|
||||||
speed_mode: I2cSpeed,
|
speed_mode: I2cSpeed,
|
||||||
sys_cfg: Option<&mut SYSCONFIG>,
|
sys_cfg: Option<&mut SYSCONFIG>,
|
||||||
) -> Self {
|
) -> Self {
|
||||||
|
28
src/spi.rs
28
src/spi.rs
@ -218,9 +218,9 @@ pub struct ReducedTransferConfig {
|
|||||||
}
|
}
|
||||||
|
|
||||||
impl TransferConfig<NoneT> {
|
impl TransferConfig<NoneT> {
|
||||||
pub fn new_no_hw_cs(spi_clk: Hertz, mode: Mode, blockmode: bool, sod: bool) -> Self {
|
pub fn new_no_hw_cs(spi_clk: impl Into<Hertz>, mode: Mode, blockmode: bool, sod: bool) -> Self {
|
||||||
TransferConfig {
|
TransferConfig {
|
||||||
spi_clk,
|
spi_clk: spi_clk.into(),
|
||||||
mode,
|
mode,
|
||||||
hw_cs: None,
|
hw_cs: None,
|
||||||
sod,
|
sod,
|
||||||
@ -231,14 +231,14 @@ impl TransferConfig<NoneT> {
|
|||||||
|
|
||||||
impl<HWCS: HwCs> TransferConfig<HWCS> {
|
impl<HWCS: HwCs> TransferConfig<HWCS> {
|
||||||
pub fn new(
|
pub fn new(
|
||||||
spi_clk: Hertz,
|
spi_clk: impl Into<Hertz>,
|
||||||
mode: Mode,
|
mode: Mode,
|
||||||
hw_cs: Option<HWCS>,
|
hw_cs: Option<HWCS>,
|
||||||
blockmode: bool,
|
blockmode: bool,
|
||||||
sod: bool,
|
sod: bool,
|
||||||
) -> Self {
|
) -> Self {
|
||||||
TransferConfig {
|
TransferConfig {
|
||||||
spi_clk,
|
spi_clk: spi_clk.into(),
|
||||||
mode,
|
mode,
|
||||||
hw_cs,
|
hw_cs,
|
||||||
sod,
|
sod,
|
||||||
@ -428,6 +428,7 @@ macro_rules! spi {
|
|||||||
w.sod().bit(sod);
|
w.sod().bit(sod);
|
||||||
w.ms().bit(ms);
|
w.ms().bit(ms);
|
||||||
w.mdlycap().bit(mdlycap);
|
w.mdlycap().bit(mdlycap);
|
||||||
|
w.blockmode().bit(init_blockmode);
|
||||||
unsafe { w.ss().bits(ss) }
|
unsafe { w.ss().bits(ss) }
|
||||||
});
|
});
|
||||||
|
|
||||||
@ -452,7 +453,7 @@ macro_rules! spi {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn cfg_clock(&mut self, spi_clk: Hertz) {
|
pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) {
|
||||||
self.spi_base.cfg_clock(spi_clk);
|
self.spi_base.cfg_clock(spi_clk);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -482,8 +483,8 @@ macro_rules! spi {
|
|||||||
|
|
||||||
impl<WORD: Word> SpiBase<$SPIX, WORD> {
|
impl<WORD: Word> SpiBase<$SPIX, WORD> {
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn cfg_clock(&mut self, spi_clk: Hertz) {
|
pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) {
|
||||||
let clk_prescale = self.sys_clk.0 / (spi_clk.0 * (self.cfg.scrdv as u32 + 1));
|
let clk_prescale = self.sys_clk.0 / (spi_clk.into().0 * (self.cfg.scrdv as u32 + 1));
|
||||||
self.spi
|
self.spi
|
||||||
.clkprescale
|
.clkprescale
|
||||||
.write(|w| unsafe { w.bits(clk_prescale) });
|
.write(|w| unsafe { w.bits(clk_prescale) });
|
||||||
@ -503,6 +504,16 @@ macro_rules! spi {
|
|||||||
});
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#[inline]
|
||||||
|
pub fn clear_tx_fifo(&self) {
|
||||||
|
self.spi.fifo_clr.write(|w| w.txfifo().set_bit());
|
||||||
|
}
|
||||||
|
|
||||||
|
#[inline]
|
||||||
|
pub fn clear_rx_fifo(&self) {
|
||||||
|
self.spi.fifo_clr.write(|w| w.rxfifo().set_bit());
|
||||||
|
}
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn perid(&self) -> u32 {
|
pub fn perid(&self) -> u32 {
|
||||||
self.spi.perid.read().bits()
|
self.spi.perid.read().bits()
|
||||||
@ -639,6 +650,9 @@ macro_rules! spi {
|
|||||||
// FIFO has a depth of 16.
|
// FIFO has a depth of 16.
|
||||||
const FILL_DEPTH: usize = 12;
|
const FILL_DEPTH: usize = 12;
|
||||||
|
|
||||||
|
self.clear_tx_fifo();
|
||||||
|
self.clear_rx_fifo();
|
||||||
|
|
||||||
if self.blockmode {
|
if self.blockmode {
|
||||||
self.spi.ctrl1.modify(|_, w| {
|
self.spi.ctrl1.modify(|_, w| {
|
||||||
w.mtxpause().set_bit()
|
w.mtxpause().set_bit()
|
||||||
|
@ -306,12 +306,12 @@ macro_rules! uart_impl {
|
|||||||
pins: PINS,
|
pins: PINS,
|
||||||
config: impl Into<Config>,
|
config: impl Into<Config>,
|
||||||
syscfg: &mut SYSCONFIG,
|
syscfg: &mut SYSCONFIG,
|
||||||
sys_clk: Hertz
|
sys_clk: impl Into<Hertz>
|
||||||
) -> Self
|
) -> Self
|
||||||
{
|
{
|
||||||
enable_peripheral_clock(syscfg, $clk_enb_enum);
|
enable_peripheral_clock(syscfg, $clk_enb_enum);
|
||||||
Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init(
|
Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init(
|
||||||
config.into(), sys_clk
|
config.into(), sys_clk.into()
|
||||||
)
|
)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -3,11 +3,25 @@
|
|||||||
//! Some more information about the recommended scrub rates can be found on the
|
//! Some more information about the recommended scrub rates can be found on the
|
||||||
//! [Vorago White Paper website](https://www.voragotech.com/resources) in the
|
//! [Vorago White Paper website](https://www.voragotech.com/resources) in the
|
||||||
//! application note AN1212
|
//! application note AN1212
|
||||||
use va108xx::SYSCONFIG;
|
use va108xx::{IOCONFIG, SYSCONFIG};
|
||||||
|
|
||||||
#[derive(PartialEq, Debug)]
|
#[derive(PartialEq, Debug)]
|
||||||
pub enum UtilityError {
|
pub enum UtilityError {
|
||||||
InvalidCounterResetVal,
|
InvalidCounterResetVal,
|
||||||
|
InvalidPin,
|
||||||
|
}
|
||||||
|
|
||||||
|
#[derive(Debug, Eq, Copy, Clone, PartialEq)]
|
||||||
|
pub enum Funsel {
|
||||||
|
Funsel1 = 0b01,
|
||||||
|
Funsel2 = 0b10,
|
||||||
|
Funsel3 = 0b11,
|
||||||
|
}
|
||||||
|
|
||||||
|
#[derive(Debug, Copy, Clone, PartialEq)]
|
||||||
|
pub enum PortSel {
|
||||||
|
PortA,
|
||||||
|
PortB,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Copy, Clone, PartialEq)]
|
#[derive(Copy, Clone, PartialEq)]
|
||||||
@ -72,3 +86,28 @@ pub fn set_reset_bit(syscfg: &mut SYSCONFIG, periph_sel: PeripheralSelect) {
|
|||||||
.peripheral_reset
|
.peripheral_reset
|
||||||
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << periph_sel as u8)) });
|
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << periph_sel as u8)) });
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Can be used to manually manipulate the function select of port pins
|
||||||
|
pub fn port_mux(
|
||||||
|
ioconfig: &mut IOCONFIG,
|
||||||
|
port: PortSel,
|
||||||
|
pin: u8,
|
||||||
|
funsel: Funsel,
|
||||||
|
) -> Result<(), UtilityError> {
|
||||||
|
match port {
|
||||||
|
PortSel::PortA => {
|
||||||
|
if pin > 31 {
|
||||||
|
return Err(UtilityError::InvalidPin);
|
||||||
|
}
|
||||||
|
ioconfig.porta[pin as usize].modify(|_, w| unsafe { w.funsel().bits(funsel as u8) });
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
PortSel::PortB => {
|
||||||
|
if pin > 23 {
|
||||||
|
return Err(UtilityError::InvalidPin);
|
||||||
|
}
|
||||||
|
ioconfig.portb[pin as usize].modify(|_, w| unsafe { w.funsel().bits(funsel as u8) });
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
Reference in New Issue
Block a user