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va108xx/src/i2ca/s0_irq_clr.rs

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First building PAC version Generated a first building version of the PAC. The PAC was generated with a specially patched version of svd2rust 0.19.0: https://github.com/robamu/svd2rust/tree/mueller/develop
2021-11-01 23:31:51 +01:00
#[doc = "Register `S0_IRQ_CLR` writer"]
pub struct W(crate::W<S0_IRQ_CLR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<S0_IRQ_CLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<S0_IRQ_CLR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<S0_IRQ_CLR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `COMPLETED` writer - Controller Complted a Transaction"]
pub struct COMPLETED_W<'a> {
w: &'a mut W,
}
impl<'a> COMPLETED_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
Important fix: Use bitmask everywhere now This PAC was generated using a patched version of svd2rust with commit hash 43be074d21132c3a76780816010df592a3603874 It includes bugfix https://github.com/rust-embedded/svd2rust/pull/549
2021-11-09 18:11:56 +01:00
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
First building PAC version Generated a first building version of the PAC. The PAC was generated with a specially patched version of svd2rust 0.19.0: https://github.com/robamu/svd2rust/tree/mueller/develop
2021-11-01 23:31:51 +01:00
self.w
}
}
#[doc = "Field `IDLE` writer - Controller is Idle"]
pub struct IDLE_W<'a> {
w: &'a mut W,
}
impl<'a> IDLE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `WAITING` writer - Controller is Waiting"]
pub struct WAITING_W<'a> {
w: &'a mut W,
}
impl<'a> WAITING_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `TXSTALLED` writer - Controller is Tx Stalled"]
pub struct TXSTALLED_W<'a> {
w: &'a mut W,
}
impl<'a> TXSTALLED_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `RXSTALLED` writer - Controller is Rx Stalled"]
pub struct RXSTALLED_W<'a> {
w: &'a mut W,
}
impl<'a> RXSTALLED_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "Field `ADDRESSMATCH` writer - I2C Address Match"]
pub struct ADDRESSMATCH_W<'a> {
w: &'a mut W,
}
impl<'a> ADDRESSMATCH_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"]
pub struct NACKDATA_W<'a> {
w: &'a mut W,
}
impl<'a> NACKDATA_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
self.w
}
}
#[doc = "Field `RXDATAFIRST` writer - Pending Data is first Byte following Address"]
pub struct RXDATAFIRST_W<'a> {
w: &'a mut W,
}
impl<'a> RXDATAFIRST_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
self.w
}
}
#[doc = "Field `I2C_START` writer - I2C Start Condition"]
pub struct I2C_START_W<'a> {
w: &'a mut W,
}
impl<'a> I2C_START_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "Field `I2C_STOP` writer - I2C Stop Condition"]
pub struct I2C_STOP_W<'a> {
w: &'a mut W,
}
impl<'a> I2C_STOP_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `TXUNDERFLOW` writer - TX FIFO Underflowed"]
pub struct TXUNDERFLOW_W<'a> {
w: &'a mut W,
}
impl<'a> TXUNDERFLOW_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
self.w
}
}
#[doc = "Field `RXOVERFLOW` writer - TX FIFO Overflowed"]
pub struct RXOVERFLOW_W<'a> {
w: &'a mut W,
}
impl<'a> RXOVERFLOW_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
#[doc = "Field `TXREADY` writer - TX FIFO Ready"]
pub struct TXREADY_W<'a> {
w: &'a mut W,
}
impl<'a> TXREADY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
#[doc = "Field `RXREADY` writer - RX FIFO Ready"]
pub struct RXREADY_W<'a> {
w: &'a mut W,
}
impl<'a> RXREADY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
self.w
}
}
#[doc = "Field `TXEMPTY` writer - TX FIFO Empty"]
pub struct TXEMPTY_W<'a> {
w: &'a mut W,
}
impl<'a> TXEMPTY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
self.w
}
}
#[doc = "Field `RXFULL` writer - RX FIFO Full"]
pub struct RXFULL_W<'a> {
w: &'a mut W,
}
impl<'a> RXFULL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
self.w
}
}
impl W {
#[doc = "Bit 0 - Controller Complted a Transaction"]
#[inline(always)]
pub fn completed(&mut self) -> COMPLETED_W {
COMPLETED_W { w: self }
}
#[doc = "Bit 1 - Controller is Idle"]
#[inline(always)]
pub fn idle(&mut self) -> IDLE_W {
IDLE_W { w: self }
}
#[doc = "Bit 2 - Controller is Waiting"]
#[inline(always)]
pub fn waiting(&mut self) -> WAITING_W {
WAITING_W { w: self }
}
#[doc = "Bit 3 - Controller is Tx Stalled"]
#[inline(always)]
pub fn txstalled(&mut self) -> TXSTALLED_W {
TXSTALLED_W { w: self }
}
#[doc = "Bit 4 - Controller is Rx Stalled"]
#[inline(always)]
pub fn rxstalled(&mut self) -> RXSTALLED_W {
RXSTALLED_W { w: self }
}
#[doc = "Bit 5 - I2C Address Match"]
#[inline(always)]
pub fn addressmatch(&mut self) -> ADDRESSMATCH_W {
ADDRESSMATCH_W { w: self }
}
#[doc = "Bit 6 - I2C Data was not Acknowledged"]
#[inline(always)]
pub fn nackdata(&mut self) -> NACKDATA_W {
NACKDATA_W { w: self }
}
#[doc = "Bit 7 - Pending Data is first Byte following Address"]
#[inline(always)]
pub fn rxdatafirst(&mut self) -> RXDATAFIRST_W {
RXDATAFIRST_W { w: self }
}
#[doc = "Bit 8 - I2C Start Condition"]
#[inline(always)]
pub fn i2c_start(&mut self) -> I2C_START_W {
I2C_START_W { w: self }
}
#[doc = "Bit 9 - I2C Stop Condition"]
#[inline(always)]
pub fn i2c_stop(&mut self) -> I2C_STOP_W {
I2C_STOP_W { w: self }
}
#[doc = "Bit 10 - TX FIFO Underflowed"]
#[inline(always)]
pub fn txunderflow(&mut self) -> TXUNDERFLOW_W {
TXUNDERFLOW_W { w: self }
}
#[doc = "Bit 11 - TX FIFO Overflowed"]
#[inline(always)]
pub fn rxoverflow(&mut self) -> RXOVERFLOW_W {
RXOVERFLOW_W { w: self }
}
#[doc = "Bit 12 - TX FIFO Ready"]
#[inline(always)]
pub fn txready(&mut self) -> TXREADY_W {
TXREADY_W { w: self }
}
#[doc = "Bit 13 - RX FIFO Ready"]
#[inline(always)]
pub fn rxready(&mut self) -> RXREADY_W {
RXREADY_W { w: self }
}
#[doc = "Bit 14 - TX FIFO Empty"]
#[inline(always)]
pub fn txempty(&mut self) -> TXEMPTY_W {
TXEMPTY_W { w: self }
}
#[doc = "Bit 15 - RX FIFO Full"]
#[inline(always)]
pub fn rxfull(&mut self) -> RXFULL_W {
RXFULL_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Slave Clear Interrupt Status Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [s0_irq_clr](index.html) module"]
pub struct S0_IRQ_CLR_SPEC;
impl crate::RegisterSpec for S0_IRQ_CLR_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [s0_irq_clr::W](W) writer structure"]
impl crate::Writable for S0_IRQ_CLR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets S0_IRQ_CLR to value 0"]
impl crate::Resettable for S0_IRQ_CLR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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