First building PAC version

Generated a first building version of the PAC. The PAC was generated with a specially patched version of svd2rust 0.19.0: https://github.com/robamu/svd2rust/tree/mueller/develop
2021-11-01 23:31:51 +01:00
parent 45d12c83bb
commit e97cd64ba6
200 changed files with 25316 additions and 9084 deletions
--- a/src/sysconfig/ef_config.rs
+++ b/src/sysconfig/ef_config.rs
@ -0,0 +1,31 @@
+#[doc = "Register `EF_CONFIG` reader"]
+pub struct R(crate::R<EF_CONFIG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EF_CONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EF_CONFIG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EF_CONFIG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "EFuse Config Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ef_config](index.html) module"]
+pub struct EF_CONFIG_SPEC;
+impl crate::RegisterSpec for EF_CONFIG_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ef_config::R](R) reader structure"]
+impl crate::Readable for EF_CONFIG_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets EF_CONFIG to value 0"]
+impl crate::Resettable for EF_CONFIG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/ef_id.rs
+++ b/src/sysconfig/ef_id.rs
@ -0,0 +1,31 @@
+#[doc = "Register `EF_ID` reader"]
+pub struct R(crate::R<EF_ID_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EF_ID_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EF_ID_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EF_ID_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "EFuse ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ef_id](index.html) module"]
+pub struct EF_ID_SPEC;
+impl crate::RegisterSpec for EF_ID_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ef_id::R](R) reader structure"]
+impl crate::Readable for EF_ID_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets EF_ID to value 0"]
+impl crate::Resettable for EF_ID_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/ioconfig_clkdiv.rs
+++ b/src/sysconfig/ioconfig_clkdiv.rs
@ -0,0 +1,64 @@
+#[doc = "Register `IOCONFIG_CLKDIV%s` reader"]
+pub struct R(crate::R<IOCONFIG_CLKDIV_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IOCONFIG_CLKDIV_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IOCONFIG_CLKDIV_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IOCONFIG_CLKDIV_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `IOCONFIG_CLKDIV%s` writer"]
+pub struct W(crate::W<IOCONFIG_CLKDIV_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<IOCONFIG_CLKDIV_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<IOCONFIG_CLKDIV_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<IOCONFIG_CLKDIV_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "IO Configuration Clock Divider Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioconfig_clkdiv](index.html) module"]
+pub struct IOCONFIG_CLKDIV_SPEC;
+impl crate::RegisterSpec for IOCONFIG_CLKDIV_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ioconfig_clkdiv::R](R) reader structure"]
+impl crate::Readable for IOCONFIG_CLKDIV_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ioconfig_clkdiv::W](W) writer structure"]
+impl crate::Writable for IOCONFIG_CLKDIV_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets IOCONFIG_CLKDIV%s to value 0"]
+impl crate::Resettable for IOCONFIG_CLKDIV_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/ioconfig_clkdiv0.rs
+++ b/src/sysconfig/ioconfig_clkdiv0.rs
@ -0,0 +1,31 @@
+#[doc = "Register `IOCONFIG_CLKDIV0` reader"]
+pub struct R(crate::R<IOCONFIG_CLKDIV0_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IOCONFIG_CLKDIV0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IOCONFIG_CLKDIV0_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IOCONFIG_CLKDIV0_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "IO Configuration Clock Divider Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioconfig_clkdiv0](index.html) module"]
+pub struct IOCONFIG_CLKDIV0_SPEC;
+impl crate::RegisterSpec for IOCONFIG_CLKDIV0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ioconfig_clkdiv0::R](R) reader structure"]
+impl crate::Readable for IOCONFIG_CLKDIV0_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets IOCONFIG_CLKDIV0 to value 0"]
+impl crate::Resettable for IOCONFIG_CLKDIV0_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/irq_clr.rs
+++ b/src/sysconfig/irq_clr.rs
@ -0,0 +1,153 @@
+#[doc = "Register `IRQ_CLR` writer"]
+pub struct W(crate::W<IRQ_CLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<IRQ_CLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<IRQ_CLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<IRQ_CLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `RAMSBE` writer - RAM Single Bit Interrupt"]
+pub struct RAMSBE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RAMSBE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `RAMMBE` writer - RAM Multi Bit Interrupt"]
+pub struct RAMMBE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RAMMBE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `ROMSBE` writer - ROM Single Bit Interrupt"]
+pub struct ROMSBE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ROMSBE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `ROMMBE` writer - ROM Multi Bit Interrupt"]
+pub struct ROMMBE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ROMMBE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
+        self.w
+    }
+}
+impl W {
+    #[doc = "Bit 0 - RAM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn ramsbe(&mut self) -> RAMSBE_W {
+        RAMSBE_W { w: self }
+    }
+    #[doc = "Bit 1 - RAM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rammbe(&mut self) -> RAMMBE_W {
+        RAMMBE_W { w: self }
+    }
+    #[doc = "Bit 2 - ROM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn romsbe(&mut self) -> ROMSBE_W {
+        ROMSBE_W { w: self }
+    }
+    #[doc = "Bit 3 - ROM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rommbe(&mut self) -> ROMMBE_W {
+        ROMMBE_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clear EDAC Error Interrupt Status\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"]
+pub struct IRQ_CLR_SPEC;
+impl crate::RegisterSpec for IRQ_CLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"]
+impl crate::Writable for IRQ_CLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets IRQ_CLR to value 0"]
+impl crate::Resettable for IRQ_CLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/irq_enb.rs
+++ b/src/sysconfig/irq_enb.rs
@ -0,0 +1,254 @@
+#[doc = "Register `IRQ_ENB` reader"]
+pub struct R(crate::R<IRQ_ENB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IRQ_ENB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IRQ_ENB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IRQ_ENB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `IRQ_ENB` writer"]
+pub struct W(crate::W<IRQ_ENB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<IRQ_ENB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<IRQ_ENB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<IRQ_ENB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `RAMSBE` reader - RAM Single Bit Interrupt"]
+pub struct RAMSBE_R(crate::FieldReader<bool, bool>);
+impl RAMSBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        RAMSBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAMSBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RAMSBE` writer - RAM Single Bit Interrupt"]
+pub struct RAMSBE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RAMSBE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `RAMMBE` reader - RAM Multi Bit Interrupt"]
+pub struct RAMMBE_R(crate::FieldReader<bool, bool>);
+impl RAMMBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        RAMMBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAMMBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RAMMBE` writer - RAM Multi Bit Interrupt"]
+pub struct RAMMBE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RAMMBE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `ROMSBE` reader - ROM Single Bit Interrupt"]
+pub struct ROMSBE_R(crate::FieldReader<bool, bool>);
+impl ROMSBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ROMSBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ROMSBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ROMSBE` writer - ROM Single Bit Interrupt"]
+pub struct ROMSBE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ROMSBE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `ROMMBE` reader - ROM Multi Bit Interrupt"]
+pub struct ROMMBE_R(crate::FieldReader<bool, bool>);
+impl ROMMBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ROMMBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ROMMBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ROMMBE` writer - ROM Multi Bit Interrupt"]
+pub struct ROMMBE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ROMMBE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - RAM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn ramsbe(&self) -> RAMSBE_R {
+        RAMSBE_R::new(self.bits != 0)
+    }
+    #[doc = "Bit 1 - RAM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rammbe(&self) -> RAMMBE_R {
+        RAMMBE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - ROM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn romsbe(&self) -> ROMSBE_R {
+        ROMSBE_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - ROM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rommbe(&self) -> ROMMBE_R {
+        ROMMBE_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - RAM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn ramsbe(&mut self) -> RAMSBE_W {
+        RAMSBE_W { w: self }
+    }
+    #[doc = "Bit 1 - RAM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rammbe(&mut self) -> RAMMBE_W {
+        RAMMBE_W { w: self }
+    }
+    #[doc = "Bit 2 - ROM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn romsbe(&mut self) -> ROMSBE_W {
+        ROMSBE_W { w: self }
+    }
+    #[doc = "Bit 3 - ROM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rommbe(&mut self) -> ROMMBE_W {
+        ROMMBE_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable EDAC Error Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_enb](index.html) module"]
+pub struct IRQ_ENB_SPEC;
+impl crate::RegisterSpec for IRQ_ENB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [irq_enb::R](R) reader structure"]
+impl crate::Readable for IRQ_ENB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [irq_enb::W](W) writer structure"]
+impl crate::Writable for IRQ_ENB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets IRQ_ENB to value 0"]
+impl crate::Resettable for IRQ_ENB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/irq_end.rs
+++ b/src/sysconfig/irq_end.rs
@ -0,0 +1,113 @@
+#[doc = "Register `IRQ_END` reader"]
+pub struct R(crate::R<IRQ_END_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IRQ_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IRQ_END_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IRQ_END_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `RAMSBE` reader - RAM Single Bit Interrupt"]
+pub struct RAMSBE_R(crate::FieldReader<bool, bool>);
+impl RAMSBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        RAMSBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAMSBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RAMMBE` reader - RAM Multi Bit Interrupt"]
+pub struct RAMMBE_R(crate::FieldReader<bool, bool>);
+impl RAMMBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        RAMMBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAMMBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ROMSBE` reader - ROM Single Bit Interrupt"]
+pub struct ROMSBE_R(crate::FieldReader<bool, bool>);
+impl ROMSBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ROMSBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ROMSBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ROMMBE` reader - ROM Multi Bit Interrupt"]
+pub struct ROMMBE_R(crate::FieldReader<bool, bool>);
+impl ROMMBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ROMMBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ROMMBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bit 0 - RAM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn ramsbe(&self) -> RAMSBE_R {
+        RAMSBE_R::new(self.bits != 0)
+    }
+    #[doc = "Bit 1 - RAM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rammbe(&self) -> RAMMBE_R {
+        RAMMBE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - ROM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn romsbe(&self) -> ROMSBE_R {
+        ROMSBE_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - ROM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rommbe(&self) -> ROMMBE_R {
+        ROMMBE_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+}
+#[doc = "Enabled EDAC Error Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_end](index.html) module"]
+pub struct IRQ_END_SPEC;
+impl crate::RegisterSpec for IRQ_END_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [irq_end::R](R) reader structure"]
+impl crate::Readable for IRQ_END_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets IRQ_END to value 0"]
+impl crate::Resettable for IRQ_END_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/irq_raw.rs
+++ b/src/sysconfig/irq_raw.rs
@ -0,0 +1,113 @@
+#[doc = "Register `IRQ_RAW` reader"]
+pub struct R(crate::R<IRQ_RAW_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IRQ_RAW_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IRQ_RAW_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IRQ_RAW_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `RAMSBE` reader - RAM Single Bit Interrupt"]
+pub struct RAMSBE_R(crate::FieldReader<bool, bool>);
+impl RAMSBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        RAMSBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAMSBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RAMMBE` reader - RAM Multi Bit Interrupt"]
+pub struct RAMMBE_R(crate::FieldReader<bool, bool>);
+impl RAMMBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        RAMMBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RAMMBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ROMSBE` reader - ROM Single Bit Interrupt"]
+pub struct ROMSBE_R(crate::FieldReader<bool, bool>);
+impl ROMSBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ROMSBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ROMSBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ROMMBE` reader - ROM Multi Bit Interrupt"]
+pub struct ROMMBE_R(crate::FieldReader<bool, bool>);
+impl ROMMBE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ROMMBE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ROMMBE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bit 0 - RAM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn ramsbe(&self) -> RAMSBE_R {
+        RAMSBE_R::new(self.bits != 0)
+    }
+    #[doc = "Bit 1 - RAM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rammbe(&self) -> RAMMBE_R {
+        RAMMBE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - ROM Single Bit Interrupt"]
+    #[inline(always)]
+    pub fn romsbe(&self) -> ROMSBE_R {
+        ROMSBE_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - ROM Multi Bit Interrupt"]
+    #[inline(always)]
+    pub fn rommbe(&self) -> ROMMBE_R {
+        ROMMBE_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+}
+#[doc = "Raw EDAC Error Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_raw](index.html) module"]
+pub struct IRQ_RAW_SPEC;
+impl crate::RegisterSpec for IRQ_RAW_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [irq_raw::R](R) reader structure"]
+impl crate::Readable for IRQ_RAW_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets IRQ_RAW to value 0"]
+impl crate::Resettable for IRQ_RAW_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/lockup_reset.rs
+++ b/src/sysconfig/lockup_reset.rs
@ -0,0 +1,113 @@
+#[doc = "Register `LOCKUP_RESET` reader"]
+pub struct R(crate::R<LOCKUP_RESET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LOCKUP_RESET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LOCKUP_RESET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LOCKUP_RESET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LOCKUP_RESET` writer"]
+pub struct W(crate::W<LOCKUP_RESET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LOCKUP_RESET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LOCKUP_RESET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LOCKUP_RESET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `LREN` reader - Lockup Reset Enable Bit"]
+pub struct LREN_R(crate::FieldReader<bool, bool>);
+impl LREN_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        LREN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LREN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LREN` writer - Lockup Reset Enable Bit"]
+pub struct LREN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LREN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Lockup Reset Enable Bit"]
+    #[inline(always)]
+    pub fn lren(&self) -> LREN_R {
+        LREN_R::new(self.bits != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Lockup Reset Enable Bit"]
+    #[inline(always)]
+    pub fn lren(&mut self) -> LREN_W {
+        LREN_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Lockup Reset Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lockup_reset](index.html) module"]
+pub struct LOCKUP_RESET_SPEC;
+impl crate::RegisterSpec for LOCKUP_RESET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lockup_reset::R](R) reader structure"]
+impl crate::Readable for LOCKUP_RESET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [lockup_reset::W](W) writer structure"]
+impl crate::Writable for LOCKUP_RESET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LOCKUP_RESET to value 0x01"]
+impl crate::Resettable for LOCKUP_RESET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}
--- a/src/sysconfig/perid.rs
+++ b/src/sysconfig/perid.rs
@ -0,0 +1,31 @@
+#[doc = "Register `PERID` reader"]
+pub struct R(crate::R<PERID_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PERID_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PERID_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PERID_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"]
+pub struct PERID_SPEC;
+impl crate::RegisterSpec for PERID_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [perid::R](R) reader structure"]
+impl crate::Readable for PERID_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets PERID to value 0x0080_07e1"]
+impl crate::Resettable for PERID_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x0080_07e1
+    }
+}
--- a/src/sysconfig/peripheral_clk_enable.rs
+++ b/src/sysconfig/peripheral_clk_enable.rs
@ -0,0 +1,64 @@
+#[doc = "Register `PERIPHERAL_CLK_ENABLE` reader"]
+pub struct R(crate::R<PERIPHERAL_CLK_ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PERIPHERAL_CLK_ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PERIPHERAL_CLK_ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PERIPHERAL_CLK_ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PERIPHERAL_CLK_ENABLE` writer"]
+pub struct W(crate::W<PERIPHERAL_CLK_ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PERIPHERAL_CLK_ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PERIPHERAL_CLK_ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PERIPHERAL_CLK_ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Peripheral Enable Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [peripheral_clk_enable](index.html) module"]
+pub struct PERIPHERAL_CLK_ENABLE_SPEC;
+impl crate::RegisterSpec for PERIPHERAL_CLK_ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [peripheral_clk_enable::R](R) reader structure"]
+impl crate::Readable for PERIPHERAL_CLK_ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [peripheral_clk_enable::W](W) writer structure"]
+impl crate::Writable for PERIPHERAL_CLK_ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PERIPHERAL_CLK_ENABLE to value 0"]
+impl crate::Resettable for PERIPHERAL_CLK_ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/peripheral_reset.rs
+++ b/src/sysconfig/peripheral_reset.rs
@ -0,0 +1,64 @@
+#[doc = "Register `PERIPHERAL_RESET` reader"]
+pub struct R(crate::R<PERIPHERAL_RESET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PERIPHERAL_RESET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PERIPHERAL_RESET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PERIPHERAL_RESET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PERIPHERAL_RESET` writer"]
+pub struct W(crate::W<PERIPHERAL_RESET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PERIPHERAL_RESET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PERIPHERAL_RESET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PERIPHERAL_RESET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Peripheral Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [peripheral_reset](index.html) module"]
+pub struct PERIPHERAL_RESET_SPEC;
+impl crate::RegisterSpec for PERIPHERAL_RESET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [peripheral_reset::R](R) reader structure"]
+impl crate::Readable for PERIPHERAL_RESET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [peripheral_reset::W](W) writer structure"]
+impl crate::Writable for PERIPHERAL_RESET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PERIPHERAL_RESET to value 0xffff_ffff"]
+impl crate::Resettable for PERIPHERAL_RESET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}
--- a/src/sysconfig/procid.rs
+++ b/src/sysconfig/procid.rs
@ -0,0 +1,31 @@
+#[doc = "Register `PROCID` reader"]
+pub struct R(crate::R<PROCID_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PROCID_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PROCID_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PROCID_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Processor ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [procid](index.html) module"]
+pub struct PROCID_SPEC;
+impl crate::RegisterSpec for PROCID_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [procid::R](R) reader structure"]
+impl crate::Readable for PROCID_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets PROCID to value 0x0400_17e3"]
+impl crate::Resettable for PROCID_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x0400_17e3
+    }
+}
--- a/src/sysconfig/ram_mbe.rs
+++ b/src/sysconfig/ram_mbe.rs
@ -0,0 +1,64 @@
+#[doc = "Register `RAM_MBE` reader"]
+pub struct R(crate::R<RAM_MBE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_MBE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_MBE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_MBE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_MBE` writer"]
+pub struct W(crate::W<RAM_MBE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_MBE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_MBE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_MBE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Count of RAM EDAC Multi Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_mbe](index.html) module"]
+pub struct RAM_MBE_SPEC;
+impl crate::RegisterSpec for RAM_MBE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_mbe::R](R) reader structure"]
+impl crate::Readable for RAM_MBE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_mbe::W](W) writer structure"]
+impl crate::Writable for RAM_MBE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_MBE to value 0"]
+impl crate::Resettable for RAM_MBE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/ram_sbe.rs
+++ b/src/sysconfig/ram_sbe.rs
@ -0,0 +1,64 @@
+#[doc = "Register `RAM_SBE` reader"]
+pub struct R(crate::R<RAM_SBE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_SBE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_SBE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_SBE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_SBE` writer"]
+pub struct W(crate::W<RAM_SBE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_SBE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_SBE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_SBE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Count of RAM EDAC Single Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_sbe](index.html) module"]
+pub struct RAM_SBE_SPEC;
+impl crate::RegisterSpec for RAM_SBE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_sbe::R](R) reader structure"]
+impl crate::Readable for RAM_SBE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_sbe::W](W) writer structure"]
+impl crate::Writable for RAM_SBE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_SBE to value 0"]
+impl crate::Resettable for RAM_SBE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/ram_scrub.rs
+++ b/src/sysconfig/ram_scrub.rs
@ -0,0 +1,130 @@
+#[doc = "Register `RAM_SCRUB` reader"]
+pub struct R(crate::R<RAM_SCRUB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_SCRUB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_SCRUB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_SCRUB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_SCRUB` writer"]
+pub struct W(crate::W<RAM_SCRUB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_SCRUB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_SCRUB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_SCRUB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `VALUE` reader - Counter divide value"]
+pub struct VALUE_R(crate::FieldReader<u32, u32>);
+impl VALUE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        VALUE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for VALUE_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `VALUE` writer - Counter divide value"]
+pub struct VALUE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> VALUE_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u32) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `RESET` writer - Reset Counter"]
+pub struct RESET_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RESET_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:23 - Counter divide value"]
+    #[inline(always)]
+    pub fn value(&self) -> VALUE_R {
+        VALUE_R::new(self.bits as u32)
+    }
+}
+impl W {
+    #[doc = "Bits 0:23 - Counter divide value"]
+    #[inline(always)]
+    pub fn value(&mut self) -> VALUE_W {
+        VALUE_W { w: self }
+    }
+    #[doc = "Bit 31 - Reset Counter"]
+    #[inline(always)]
+    pub fn reset(&mut self) -> RESET_W {
+        RESET_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM Scrub Period Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_scrub](index.html) module"]
+pub struct RAM_SCRUB_SPEC;
+impl crate::RegisterSpec for RAM_SCRUB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_scrub::R](R) reader structure"]
+impl crate::Readable for RAM_SCRUB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_scrub::W](W) writer structure"]
+impl crate::Writable for RAM_SCRUB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_SCRUB to value 0"]
+impl crate::Resettable for RAM_SCRUB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/ram_trap_addr.rs
+++ b/src/sysconfig/ram_trap_addr.rs
@ -0,0 +1,150 @@
+#[doc = "Register `RAM_TRAP_ADDR` reader"]
+pub struct R(crate::R<RAM_TRAP_ADDR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_TRAP_ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_TRAP_ADDR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_TRAP_ADDR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_TRAP_ADDR` writer"]
+pub struct W(crate::W<RAM_TRAP_ADDR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_TRAP_ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_TRAP_ADDR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_TRAP_ADDR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ADDR` reader - Trap Address Match Bits"]
+pub struct ADDR_R(crate::FieldReader<u16, u16>);
+impl ADDR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u16) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Trap Address Match Bits"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x3fff << 2)) | ((value as u32 & 0x3fff) << 2);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Trap Enable Bit"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Trap Enable Bit"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 2:15 - Trap Address Match Bits"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new(((self.bits >> 2) & 0x3fff) as u16)
+    }
+    #[doc = "Bit 31 - Trap Enable Bit"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 31) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 2:15 - Trap Address Match Bits"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Bit 31 - Trap Enable Bit"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM Trap Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_addr](index.html) module"]
+pub struct RAM_TRAP_ADDR_SPEC;
+impl crate::RegisterSpec for RAM_TRAP_ADDR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_trap_addr::R](R) reader structure"]
+impl crate::Readable for RAM_TRAP_ADDR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_trap_addr::W](W) writer structure"]
+impl crate::Writable for RAM_TRAP_ADDR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_TRAP_ADDR to value 0"]
+impl crate::Resettable for RAM_TRAP_ADDR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/ram_trap_synd.rs
+++ b/src/sysconfig/ram_trap_synd.rs
@ -0,0 +1,103 @@
+#[doc = "Register `RAM_TRAP_SYND` reader"]
+pub struct R(crate::R<RAM_TRAP_SYND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RAM_TRAP_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RAM_TRAP_SYND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RAM_TRAP_SYND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RAM_TRAP_SYND` writer"]
+pub struct W(crate::W<RAM_TRAP_SYND_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RAM_TRAP_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RAM_TRAP_SYND_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RAM_TRAP_SYND_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SYND` reader - Trap Syndrom Bits"]
+pub struct SYND_R(crate::FieldReader<u32, u32>);
+impl SYND_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        SYND_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYND_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYND` writer - Trap Syndrom Bits"]
+pub struct SYND_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SYND_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u32) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:19 - Trap Syndrom Bits"]
+    #[inline(always)]
+    pub fn synd(&self) -> SYND_R {
+        SYND_R::new(self.bits as u32)
+    }
+}
+impl W {
+    #[doc = "Bits 0:19 - Trap Syndrom Bits"]
+    #[inline(always)]
+    pub fn synd(&mut self) -> SYND_W {
+        SYND_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM Trap Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ram_trap_synd](index.html) module"]
+pub struct RAM_TRAP_SYND_SPEC;
+impl crate::RegisterSpec for RAM_TRAP_SYND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ram_trap_synd::R](R) reader structure"]
+impl crate::Readable for RAM_TRAP_SYND_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ram_trap_synd::W](W) writer structure"]
+impl crate::Writable for RAM_TRAP_SYND_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RAM_TRAP_SYND to value 0"]
+impl crate::Resettable for RAM_TRAP_SYND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/refresh_config.rs
+++ b/src/sysconfig/refresh_config.rs
@ -0,0 +1,64 @@
+#[doc = "Register `REFRESH_CONFIG` reader"]
+pub struct R(crate::R<REFRESH_CONFIG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<REFRESH_CONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<REFRESH_CONFIG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<REFRESH_CONFIG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `REFRESH_CONFIG` writer"]
+pub struct W(crate::W<REFRESH_CONFIG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<REFRESH_CONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<REFRESH_CONFIG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<REFRESH_CONFIG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Register Refresh Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refresh_config](index.html) module"]
+pub struct REFRESH_CONFIG_SPEC;
+impl crate::RegisterSpec for REFRESH_CONFIG_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [refresh_config::R](R) reader structure"]
+impl crate::Readable for REFRESH_CONFIG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [refresh_config::W](W) writer structure"]
+impl crate::Writable for REFRESH_CONFIG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets REFRESH_CONFIG to value 0"]
+impl crate::Resettable for REFRESH_CONFIG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/rom_mbe.rs
+++ b/src/sysconfig/rom_mbe.rs
@ -0,0 +1,64 @@
+#[doc = "Register `ROM_MBE` reader"]
+pub struct R(crate::R<ROM_MBE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_MBE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_MBE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_MBE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ROM_MBE` writer"]
+pub struct W(crate::W<ROM_MBE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ROM_MBE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ROM_MBE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ROM_MBE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Count of ROM EDAC Multi Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_mbe](index.html) module"]
+pub struct ROM_MBE_SPEC;
+impl crate::RegisterSpec for ROM_MBE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_mbe::R](R) reader structure"]
+impl crate::Readable for ROM_MBE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rom_mbe::W](W) writer structure"]
+impl crate::Writable for ROM_MBE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ROM_MBE to value 0"]
+impl crate::Resettable for ROM_MBE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/rom_prot.rs
+++ b/src/sysconfig/rom_prot.rs
@ -0,0 +1,113 @@
+#[doc = "Register `ROM_PROT` reader"]
+pub struct R(crate::R<ROM_PROT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_PROT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_PROT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_PROT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ROM_PROT` writer"]
+pub struct W(crate::W<ROM_PROT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ROM_PROT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ROM_PROT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ROM_PROT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `WREN` reader - ROM Write Enable Bit"]
+pub struct WREN_R(crate::FieldReader<bool, bool>);
+impl WREN_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        WREN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for WREN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `WREN` writer - ROM Write Enable Bit"]
+pub struct WREN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> WREN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - ROM Write Enable Bit"]
+    #[inline(always)]
+    pub fn wren(&self) -> WREN_R {
+        WREN_R::new(self.bits != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - ROM Write Enable Bit"]
+    #[inline(always)]
+    pub fn wren(&mut self) -> WREN_W {
+        WREN_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ROM Protection Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_prot](index.html) module"]
+pub struct ROM_PROT_SPEC;
+impl crate::RegisterSpec for ROM_PROT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_prot::R](R) reader structure"]
+impl crate::Readable for ROM_PROT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rom_prot::W](W) writer structure"]
+impl crate::Writable for ROM_PROT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ROM_PROT to value 0x01"]
+impl crate::Resettable for ROM_PROT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}
--- a/src/sysconfig/rom_retries.rs
+++ b/src/sysconfig/rom_retries.rs
@ -0,0 +1,31 @@
+#[doc = "Register `ROM_RETRIES` reader"]
+pub struct R(crate::R<ROM_RETRIES_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_RETRIES_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_RETRIES_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_RETRIES_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "ROM BOOT Retry count\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_retries](index.html) module"]
+pub struct ROM_RETRIES_SPEC;
+impl crate::RegisterSpec for ROM_RETRIES_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_retries::R](R) reader structure"]
+impl crate::Readable for ROM_RETRIES_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets ROM_RETRIES to value 0"]
+impl crate::Resettable for ROM_RETRIES_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/rom_sbe.rs
+++ b/src/sysconfig/rom_sbe.rs
@ -0,0 +1,64 @@
+#[doc = "Register `ROM_SBE` reader"]
+pub struct R(crate::R<ROM_SBE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_SBE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_SBE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_SBE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ROM_SBE` writer"]
+pub struct W(crate::W<ROM_SBE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ROM_SBE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ROM_SBE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ROM_SBE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Count of ROM EDAC Single Bit Errors\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_sbe](index.html) module"]
+pub struct ROM_SBE_SPEC;
+impl crate::RegisterSpec for ROM_SBE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_sbe::R](R) reader structure"]
+impl crate::Readable for ROM_SBE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rom_sbe::W](W) writer structure"]
+impl crate::Writable for ROM_SBE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ROM_SBE to value 0"]
+impl crate::Resettable for ROM_SBE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/rom_scrub.rs
+++ b/src/sysconfig/rom_scrub.rs
@ -0,0 +1,130 @@
+#[doc = "Register `ROM_SCRUB` reader"]
+pub struct R(crate::R<ROM_SCRUB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_SCRUB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_SCRUB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_SCRUB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ROM_SCRUB` writer"]
+pub struct W(crate::W<ROM_SCRUB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ROM_SCRUB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ROM_SCRUB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ROM_SCRUB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `VALUE` reader - Counter divide value"]
+pub struct VALUE_R(crate::FieldReader<u32, u32>);
+impl VALUE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        VALUE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for VALUE_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `VALUE` writer - Counter divide value"]
+pub struct VALUE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> VALUE_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u32) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `RESET` writer - Reset Counter"]
+pub struct RESET_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RESET_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:23 - Counter divide value"]
+    #[inline(always)]
+    pub fn value(&self) -> VALUE_R {
+        VALUE_R::new(self.bits as u32)
+    }
+}
+impl W {
+    #[doc = "Bits 0:23 - Counter divide value"]
+    #[inline(always)]
+    pub fn value(&mut self) -> VALUE_W {
+        VALUE_W { w: self }
+    }
+    #[doc = "Bit 31 - Reset Counter"]
+    #[inline(always)]
+    pub fn reset(&mut self) -> RESET_W {
+        RESET_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ROM Scrub Period Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_scrub](index.html) module"]
+pub struct ROM_SCRUB_SPEC;
+impl crate::RegisterSpec for ROM_SCRUB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_scrub::R](R) reader structure"]
+impl crate::Readable for ROM_SCRUB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rom_scrub::W](W) writer structure"]
+impl crate::Writable for ROM_SCRUB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ROM_SCRUB to value 0"]
+impl crate::Resettable for ROM_SCRUB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/rom_trap_addr.rs
+++ b/src/sysconfig/rom_trap_addr.rs
@ -0,0 +1,150 @@
+#[doc = "Register `ROM_TRAP_ADDR` reader"]
+pub struct R(crate::R<ROM_TRAP_ADDR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_TRAP_ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_TRAP_ADDR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_TRAP_ADDR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ROM_TRAP_ADDR` writer"]
+pub struct W(crate::W<ROM_TRAP_ADDR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ROM_TRAP_ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ROM_TRAP_ADDR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ROM_TRAP_ADDR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ADDR` reader - Trap Address Match Bits"]
+pub struct ADDR_R(crate::FieldReader<u16, u16>);
+impl ADDR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u16) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Trap Address Match Bits"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x3fff << 2)) | ((value as u32 & 0x3fff) << 2);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Trap Enable Bit"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Trap Enable Bit"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 2:15 - Trap Address Match Bits"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new(((self.bits >> 2) & 0x3fff) as u16)
+    }
+    #[doc = "Bit 31 - Trap Enable Bit"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 31) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 2:15 - Trap Address Match Bits"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Bit 31 - Trap Enable Bit"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ROM Trap Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_trap_addr](index.html) module"]
+pub struct ROM_TRAP_ADDR_SPEC;
+impl crate::RegisterSpec for ROM_TRAP_ADDR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_trap_addr::R](R) reader structure"]
+impl crate::Readable for ROM_TRAP_ADDR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rom_trap_addr::W](W) writer structure"]
+impl crate::Writable for ROM_TRAP_ADDR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ROM_TRAP_ADDR to value 0"]
+impl crate::Resettable for ROM_TRAP_ADDR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/rom_trap_synd.rs
+++ b/src/sysconfig/rom_trap_synd.rs
@ -0,0 +1,103 @@
+#[doc = "Register `ROM_TRAP_SYND` reader"]
+pub struct R(crate::R<ROM_TRAP_SYND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ROM_TRAP_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ROM_TRAP_SYND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ROM_TRAP_SYND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ROM_TRAP_SYND` writer"]
+pub struct W(crate::W<ROM_TRAP_SYND_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ROM_TRAP_SYND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ROM_TRAP_SYND_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ROM_TRAP_SYND_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SYND` reader - Trap Syndrom Bits"]
+pub struct SYND_R(crate::FieldReader<u32, u32>);
+impl SYND_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u32) -> Self {
+        SYND_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYND_R {
+    type Target = crate::FieldReader<u32, u32>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYND` writer - Trap Syndrom Bits"]
+pub struct SYND_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SYND_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u32) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:19 - Trap Syndrom Bits"]
+    #[inline(always)]
+    pub fn synd(&self) -> SYND_R {
+        SYND_R::new(self.bits as u32)
+    }
+}
+impl W {
+    #[doc = "Bits 0:19 - Trap Syndrom Bits"]
+    #[inline(always)]
+    pub fn synd(&mut self) -> SYND_W {
+        SYND_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ROM Trap Syndrome\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_trap_synd](index.html) module"]
+pub struct ROM_TRAP_SYND_SPEC;
+impl crate::RegisterSpec for ROM_TRAP_SYND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rom_trap_synd::R](R) reader structure"]
+impl crate::Readable for ROM_TRAP_SYND_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rom_trap_synd::W](W) writer structure"]
+impl crate::Writable for ROM_TRAP_SYND_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ROM_TRAP_SYND to value 0"]
+impl crate::Resettable for ROM_TRAP_SYND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/rst_cntl_ram.rs
+++ b/src/sysconfig/rst_cntl_ram.rs
@ -0,0 +1,348 @@
+#[doc = "Register `RST_CNTL_RAM` reader"]
+pub struct R(crate::R<RST_CNTL_RAM_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RST_CNTL_RAM_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RST_CNTL_RAM_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RST_CNTL_RAM_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RST_CNTL_RAM` writer"]
+pub struct W(crate::W<RST_CNTL_RAM_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RST_CNTL_RAM_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RST_CNTL_RAM_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RST_CNTL_RAM_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `POR` reader - Power On Reset Status"]
+pub struct POR_R(crate::FieldReader<bool, bool>);
+impl POR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        POR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for POR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `POR` writer - Power On Reset Status"]
+pub struct POR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> POR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `EXTRST` reader - External Reset Status"]
+pub struct EXTRST_R(crate::FieldReader<bool, bool>);
+impl EXTRST_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        EXTRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for EXTRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `EXTRST` writer - External Reset Status"]
+pub struct EXTRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> EXTRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `SYSRSTREQ` reader - SYSRESETREQ Reset Status"]
+pub struct SYSRSTREQ_R(crate::FieldReader<bool, bool>);
+impl SYSRSTREQ_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        SYSRSTREQ_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYSRSTREQ_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYSRSTREQ` writer - SYSRESETREQ Reset Status"]
+pub struct SYSRSTREQ_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SYSRSTREQ_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `LOOKUP` reader - LOOKUP Reset Status"]
+pub struct LOOKUP_R(crate::FieldReader<bool, bool>);
+impl LOOKUP_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        LOOKUP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LOOKUP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LOOKUP` writer - LOOKUP Reset Status"]
+pub struct LOOKUP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LOOKUP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `WATCHDOG` reader - WATCHDOG Reset Status"]
+pub struct WATCHDOG_R(crate::FieldReader<bool, bool>);
+impl WATCHDOG_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        WATCHDOG_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for WATCHDOG_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `WATCHDOG` writer - WATCHDOG Reset Status"]
+pub struct WATCHDOG_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> WATCHDOG_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `MEMERR` reader - Memory Error Reset Status"]
+pub struct MEMERR_R(crate::FieldReader<bool, bool>);
+impl MEMERR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        MEMERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MEMERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MEMERR` writer - Memory Error Reset Status"]
+pub struct MEMERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MEMERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Power On Reset Status"]
+    #[inline(always)]
+    pub fn por(&self) -> POR_R {
+        POR_R::new(self.bits != 0)
+    }
+    #[doc = "Bit 1 - External Reset Status"]
+    #[inline(always)]
+    pub fn extrst(&self) -> EXTRST_R {
+        EXTRST_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - SYSRESETREQ Reset Status"]
+    #[inline(always)]
+    pub fn sysrstreq(&self) -> SYSRSTREQ_R {
+        SYSRSTREQ_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - LOOKUP Reset Status"]
+    #[inline(always)]
+    pub fn lookup(&self) -> LOOKUP_R {
+        LOOKUP_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - WATCHDOG Reset Status"]
+    #[inline(always)]
+    pub fn watchdog(&self) -> WATCHDOG_R {
+        WATCHDOG_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Memory Error Reset Status"]
+    #[inline(always)]
+    pub fn memerr(&self) -> MEMERR_R {
+        MEMERR_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Power On Reset Status"]
+    #[inline(always)]
+    pub fn por(&mut self) -> POR_W {
+        POR_W { w: self }
+    }
+    #[doc = "Bit 1 - External Reset Status"]
+    #[inline(always)]
+    pub fn extrst(&mut self) -> EXTRST_W {
+        EXTRST_W { w: self }
+    }
+    #[doc = "Bit 2 - SYSRESETREQ Reset Status"]
+    #[inline(always)]
+    pub fn sysrstreq(&mut self) -> SYSRSTREQ_W {
+        SYSRSTREQ_W { w: self }
+    }
+    #[doc = "Bit 3 - LOOKUP Reset Status"]
+    #[inline(always)]
+    pub fn lookup(&mut self) -> LOOKUP_W {
+        LOOKUP_W { w: self }
+    }
+    #[doc = "Bit 4 - WATCHDOG Reset Status"]
+    #[inline(always)]
+    pub fn watchdog(&mut self) -> WATCHDOG_W {
+        WATCHDOG_W { w: self }
+    }
+    #[doc = "Bit 5 - Memory Error Reset Status"]
+    #[inline(always)]
+    pub fn memerr(&mut self) -> MEMERR_W {
+        MEMERR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_cntl_ram](index.html) module"]
+pub struct RST_CNTL_RAM_SPEC;
+impl crate::RegisterSpec for RST_CNTL_RAM_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rst_cntl_ram::R](R) reader structure"]
+impl crate::Readable for RST_CNTL_RAM_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rst_cntl_ram::W](W) writer structure"]
+impl crate::Writable for RST_CNTL_RAM_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RST_CNTL_RAM to value 0x1f"]
+impl crate::Resettable for RST_CNTL_RAM_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x1f
+    }
+}
--- a/src/sysconfig/rst_cntl_rom.rs
+++ b/src/sysconfig/rst_cntl_rom.rs
@ -0,0 +1,348 @@
+#[doc = "Register `RST_CNTL_ROM` reader"]
+pub struct R(crate::R<RST_CNTL_ROM_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RST_CNTL_ROM_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RST_CNTL_ROM_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RST_CNTL_ROM_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RST_CNTL_ROM` writer"]
+pub struct W(crate::W<RST_CNTL_ROM_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RST_CNTL_ROM_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RST_CNTL_ROM_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RST_CNTL_ROM_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `POR` reader - Power On Reset Status"]
+pub struct POR_R(crate::FieldReader<bool, bool>);
+impl POR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        POR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for POR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `POR` writer - Power On Reset Status"]
+pub struct POR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> POR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `EXTRST` reader - External Reset Status"]
+pub struct EXTRST_R(crate::FieldReader<bool, bool>);
+impl EXTRST_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        EXTRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for EXTRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `EXTRST` writer - External Reset Status"]
+pub struct EXTRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> EXTRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `SYSRSTREQ` reader - SYSRESETREQ Reset Status"]
+pub struct SYSRSTREQ_R(crate::FieldReader<bool, bool>);
+impl SYSRSTREQ_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        SYSRSTREQ_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYSRSTREQ_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYSRSTREQ` writer - SYSRESETREQ Reset Status"]
+pub struct SYSRSTREQ_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SYSRSTREQ_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `LOOKUP` reader - LOOKUP Reset Status"]
+pub struct LOOKUP_R(crate::FieldReader<bool, bool>);
+impl LOOKUP_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        LOOKUP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LOOKUP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LOOKUP` writer - LOOKUP Reset Status"]
+pub struct LOOKUP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LOOKUP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `WATCHDOG` reader - WATCHDOG Reset Status"]
+pub struct WATCHDOG_R(crate::FieldReader<bool, bool>);
+impl WATCHDOG_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        WATCHDOG_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for WATCHDOG_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `WATCHDOG` writer - WATCHDOG Reset Status"]
+pub struct WATCHDOG_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> WATCHDOG_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `MEMERR` reader - Memory Error Reset Status"]
+pub struct MEMERR_R(crate::FieldReader<bool, bool>);
+impl MEMERR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        MEMERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MEMERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MEMERR` writer - Memory Error Reset Status"]
+pub struct MEMERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MEMERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Power On Reset Status"]
+    #[inline(always)]
+    pub fn por(&self) -> POR_R {
+        POR_R::new(self.bits != 0)
+    }
+    #[doc = "Bit 1 - External Reset Status"]
+    #[inline(always)]
+    pub fn extrst(&self) -> EXTRST_R {
+        EXTRST_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - SYSRESETREQ Reset Status"]
+    #[inline(always)]
+    pub fn sysrstreq(&self) -> SYSRSTREQ_R {
+        SYSRSTREQ_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - LOOKUP Reset Status"]
+    #[inline(always)]
+    pub fn lookup(&self) -> LOOKUP_R {
+        LOOKUP_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - WATCHDOG Reset Status"]
+    #[inline(always)]
+    pub fn watchdog(&self) -> WATCHDOG_R {
+        WATCHDOG_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Memory Error Reset Status"]
+    #[inline(always)]
+    pub fn memerr(&self) -> MEMERR_R {
+        MEMERR_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Power On Reset Status"]
+    #[inline(always)]
+    pub fn por(&mut self) -> POR_W {
+        POR_W { w: self }
+    }
+    #[doc = "Bit 1 - External Reset Status"]
+    #[inline(always)]
+    pub fn extrst(&mut self) -> EXTRST_W {
+        EXTRST_W { w: self }
+    }
+    #[doc = "Bit 2 - SYSRESETREQ Reset Status"]
+    #[inline(always)]
+    pub fn sysrstreq(&mut self) -> SYSRSTREQ_W {
+        SYSRSTREQ_W { w: self }
+    }
+    #[doc = "Bit 3 - LOOKUP Reset Status"]
+    #[inline(always)]
+    pub fn lookup(&mut self) -> LOOKUP_W {
+        LOOKUP_W { w: self }
+    }
+    #[doc = "Bit 4 - WATCHDOG Reset Status"]
+    #[inline(always)]
+    pub fn watchdog(&mut self) -> WATCHDOG_W {
+        WATCHDOG_W { w: self }
+    }
+    #[doc = "Bit 5 - Memory Error Reset Status"]
+    #[inline(always)]
+    pub fn memerr(&mut self) -> MEMERR_W {
+        MEMERR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ROM Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_cntl_rom](index.html) module"]
+pub struct RST_CNTL_ROM_SPEC;
+impl crate::RegisterSpec for RST_CNTL_ROM_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rst_cntl_rom::R](R) reader structure"]
+impl crate::Readable for RST_CNTL_ROM_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rst_cntl_rom::W](W) writer structure"]
+impl crate::Writable for RST_CNTL_ROM_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RST_CNTL_ROM to value 0x1f"]
+impl crate::Resettable for RST_CNTL_ROM_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x1f
+    }
+}
--- a/src/sysconfig/rst_stat.rs
+++ b/src/sysconfig/rst_stat.rs
@ -0,0 +1,348 @@
+#[doc = "Register `RST_STAT` reader"]
+pub struct R(crate::R<RST_STAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RST_STAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RST_STAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RST_STAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RST_STAT` writer"]
+pub struct W(crate::W<RST_STAT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RST_STAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RST_STAT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RST_STAT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `POR` reader - Power On Reset Status"]
+pub struct POR_R(crate::FieldReader<bool, bool>);
+impl POR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        POR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for POR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `POR` writer - Power On Reset Status"]
+pub struct POR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> POR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `EXTRST` reader - External Reset Status"]
+pub struct EXTRST_R(crate::FieldReader<bool, bool>);
+impl EXTRST_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        EXTRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for EXTRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `EXTRST` writer - External Reset Status"]
+pub struct EXTRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> EXTRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `SYSRSTREQ` reader - SYSRESETREQ Reset Status"]
+pub struct SYSRSTREQ_R(crate::FieldReader<bool, bool>);
+impl SYSRSTREQ_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        SYSRSTREQ_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYSRSTREQ_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYSRSTREQ` writer - SYSRESETREQ Reset Status"]
+pub struct SYSRSTREQ_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SYSRSTREQ_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `LOOKUP` reader - LOOKUP Reset Status"]
+pub struct LOOKUP_R(crate::FieldReader<bool, bool>);
+impl LOOKUP_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        LOOKUP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LOOKUP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LOOKUP` writer - LOOKUP Reset Status"]
+pub struct LOOKUP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LOOKUP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `WATCHDOG` reader - WATCHDOG Reset Status"]
+pub struct WATCHDOG_R(crate::FieldReader<bool, bool>);
+impl WATCHDOG_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        WATCHDOG_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for WATCHDOG_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `WATCHDOG` writer - WATCHDOG Reset Status"]
+pub struct WATCHDOG_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> WATCHDOG_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `MEMERR` reader - Memory Error Reset Status"]
+pub struct MEMERR_R(crate::FieldReader<bool, bool>);
+impl MEMERR_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        MEMERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MEMERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MEMERR` writer - Memory Error Reset Status"]
+pub struct MEMERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MEMERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Power On Reset Status"]
+    #[inline(always)]
+    pub fn por(&self) -> POR_R {
+        POR_R::new(self.bits != 0)
+    }
+    #[doc = "Bit 1 - External Reset Status"]
+    #[inline(always)]
+    pub fn extrst(&self) -> EXTRST_R {
+        EXTRST_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - SYSRESETREQ Reset Status"]
+    #[inline(always)]
+    pub fn sysrstreq(&self) -> SYSRSTREQ_R {
+        SYSRSTREQ_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - LOOKUP Reset Status"]
+    #[inline(always)]
+    pub fn lookup(&self) -> LOOKUP_R {
+        LOOKUP_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - WATCHDOG Reset Status"]
+    #[inline(always)]
+    pub fn watchdog(&self) -> WATCHDOG_R {
+        WATCHDOG_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Memory Error Reset Status"]
+    #[inline(always)]
+    pub fn memerr(&self) -> MEMERR_R {
+        MEMERR_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Power On Reset Status"]
+    #[inline(always)]
+    pub fn por(&mut self) -> POR_W {
+        POR_W { w: self }
+    }
+    #[doc = "Bit 1 - External Reset Status"]
+    #[inline(always)]
+    pub fn extrst(&mut self) -> EXTRST_W {
+        EXTRST_W { w: self }
+    }
+    #[doc = "Bit 2 - SYSRESETREQ Reset Status"]
+    #[inline(always)]
+    pub fn sysrstreq(&mut self) -> SYSRSTREQ_W {
+        SYSRSTREQ_W { w: self }
+    }
+    #[doc = "Bit 3 - LOOKUP Reset Status"]
+    #[inline(always)]
+    pub fn lookup(&mut self) -> LOOKUP_W {
+        LOOKUP_W { w: self }
+    }
+    #[doc = "Bit 4 - WATCHDOG Reset Status"]
+    #[inline(always)]
+    pub fn watchdog(&mut self) -> WATCHDOG_W {
+        WATCHDOG_W { w: self }
+    }
+    #[doc = "Bit 5 - Memory Error Reset Status"]
+    #[inline(always)]
+    pub fn memerr(&mut self) -> MEMERR_W {
+        MEMERR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "System Reset Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_stat](index.html) module"]
+pub struct RST_STAT_SPEC;
+impl crate::RegisterSpec for RST_STAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rst_stat::R](R) reader structure"]
+impl crate::Readable for RST_STAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rst_stat::W](W) writer structure"]
+impl crate::Writable for RST_STAT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RST_STAT to value 0x01"]
+impl crate::Resettable for RST_STAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}
--- a/src/sysconfig/tim_clk_enable.rs
+++ b/src/sysconfig/tim_clk_enable.rs
@ -0,0 +1,64 @@
+#[doc = "Register `TIM_CLK_ENABLE` reader"]
+pub struct R(crate::R<TIM_CLK_ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<TIM_CLK_ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<TIM_CLK_ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<TIM_CLK_ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `TIM_CLK_ENABLE` writer"]
+pub struct W(crate::W<TIM_CLK_ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TIM_CLK_ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TIM_CLK_ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TIM_CLK_ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "TIM Enable Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tim_clk_enable](index.html) module"]
+pub struct TIM_CLK_ENABLE_SPEC;
+impl crate::RegisterSpec for TIM_CLK_ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [tim_clk_enable::R](R) reader structure"]
+impl crate::Readable for TIM_CLK_ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [tim_clk_enable::W](W) writer structure"]
+impl crate::Writable for TIM_CLK_ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TIM_CLK_ENABLE to value 0"]
+impl crate::Resettable for TIM_CLK_ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
--- a/src/sysconfig/tim_reset.rs
+++ b/src/sysconfig/tim_reset.rs
@ -0,0 +1,64 @@
+#[doc = "Register `TIM_RESET` reader"]
+pub struct R(crate::R<TIM_RESET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<TIM_RESET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<TIM_RESET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<TIM_RESET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `TIM_RESET` writer"]
+pub struct W(crate::W<TIM_RESET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TIM_RESET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TIM_RESET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TIM_RESET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "TIM Reset Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tim_reset](index.html) module"]
+pub struct TIM_RESET_SPEC;
+impl crate::RegisterSpec for TIM_RESET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [tim_reset::R](R) reader structure"]
+impl crate::Readable for TIM_RESET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [tim_reset::W](W) writer structure"]
+impl crate::Writable for TIM_RESET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TIM_RESET to value 0xffff_ffff"]
+impl crate::Resettable for TIM_RESET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}