First building PAC version

Generated a first building version of the PAC.
The PAC was generated with a specially patched version
of svd2rust 0.19.0: https://github.com/robamu/svd2rust/tree/mueller/develop

src/tim0/cascade0.rs

@@ -0,0 +1,103 @@
+#[doc = "Register `CASCADE0` reader"]
+pub struct R(crate::R<CASCADE0_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CASCADE0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CASCADE0_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CASCADE0_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CASCADE0` writer"]
+pub struct W(crate::W<CASCADE0_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CASCADE0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CASCADE0_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CASCADE0_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CASSEL` reader - Cascade Selection"]
+pub struct CASSEL_R(crate::FieldReader<u8, u8>);
+impl CASSEL_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        CASSEL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CASSEL_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CASSEL` writer - Cascade Selection"]
+pub struct CASSEL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CASSEL_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Cascade Selection"]
+    #[inline(always)]
+    pub fn cassel(&self) -> CASSEL_R {
+        CASSEL_R::new(self.bits as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Cascade Selection"]
+    #[inline(always)]
+    pub fn cassel(&mut self) -> CASSEL_W {
+        CASSEL_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Cascade Enable Selection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cascade0](index.html) module"]
+pub struct CASCADE0_SPEC;
+impl crate::RegisterSpec for CASCADE0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cascade0::R](R) reader structure"]
+impl crate::Readable for CASCADE0_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cascade0::W](W) writer structure"]
+impl crate::Writable for CASCADE0_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CASCADE0 to value 0"]
+impl crate::Resettable for CASCADE0_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/cascade1.rs

@@ -0,0 +1,103 @@
+#[doc = "Register `CASCADE1` reader"]
+pub struct R(crate::R<CASCADE1_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CASCADE1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CASCADE1_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CASCADE1_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CASCADE1` writer"]
+pub struct W(crate::W<CASCADE1_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CASCADE1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CASCADE1_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CASCADE1_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CASSEL` reader - Cascade Selection"]
+pub struct CASSEL_R(crate::FieldReader<u8, u8>);
+impl CASSEL_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        CASSEL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CASSEL_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CASSEL` writer - Cascade Selection"]
+pub struct CASSEL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CASSEL_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Cascade Selection"]
+    #[inline(always)]
+    pub fn cassel(&self) -> CASSEL_R {
+        CASSEL_R::new(self.bits as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Cascade Selection"]
+    #[inline(always)]
+    pub fn cassel(&mut self) -> CASSEL_W {
+        CASSEL_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Cascade Enable Selection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cascade1](index.html) module"]
+pub struct CASCADE1_SPEC;
+impl crate::RegisterSpec for CASCADE1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cascade1::R](R) reader structure"]
+impl crate::Readable for CASCADE1_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cascade1::W](W) writer structure"]
+impl crate::Writable for CASCADE1_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CASCADE1 to value 0"]
+impl crate::Resettable for CASCADE1_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/cascade2.rs

@@ -0,0 +1,103 @@
+#[doc = "Register `CASCADE2` reader"]
+pub struct R(crate::R<CASCADE2_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CASCADE2_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CASCADE2_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CASCADE2_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CASCADE2` writer"]
+pub struct W(crate::W<CASCADE2_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CASCADE2_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CASCADE2_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CASCADE2_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CASSEL` reader - Cascade Selection"]
+pub struct CASSEL_R(crate::FieldReader<u8, u8>);
+impl CASSEL_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        CASSEL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CASSEL_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CASSEL` writer - Cascade Selection"]
+pub struct CASSEL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CASSEL_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Cascade Selection"]
+    #[inline(always)]
+    pub fn cassel(&self) -> CASSEL_R {
+        CASSEL_R::new(self.bits as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Cascade Selection"]
+    #[inline(always)]
+    pub fn cassel(&mut self) -> CASSEL_W {
+        CASSEL_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Cascade Enable Selection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cascade2](index.html) module"]
+pub struct CASCADE2_SPEC;
+impl crate::RegisterSpec for CASCADE2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cascade2::R](R) reader structure"]
+impl crate::Readable for CASCADE2_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cascade2::W](W) writer structure"]
+impl crate::Writable for CASCADE2_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CASCADE2 to value 0"]
+impl crate::Resettable for CASCADE2_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/cnt_value.rs

@@ -0,0 +1,64 @@
+#[doc = "Register `CNT_VALUE` reader"]
+pub struct R(crate::R<CNT_VALUE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CNT_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CNT_VALUE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CNT_VALUE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CNT_VALUE` writer"]
+pub struct W(crate::W<CNT_VALUE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CNT_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CNT_VALUE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CNT_VALUE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "The current value of the counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt_value](index.html) module"]
+pub struct CNT_VALUE_SPEC;
+impl crate::RegisterSpec for CNT_VALUE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cnt_value::R](R) reader structure"]
+impl crate::Readable for CNT_VALUE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cnt_value::W](W) writer structure"]
+impl crate::Writable for CNT_VALUE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CNT_VALUE to value 0"]
+impl crate::Resettable for CNT_VALUE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/csd_ctrl.rs

@@ -0,0 +1,536 @@
+#[doc = "Register `CSD_CTRL` reader"]
+pub struct R(crate::R<CSD_CTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CSD_CTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CSD_CTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CSD_CTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CSD_CTRL` writer"]
+pub struct W(crate::W<CSD_CTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CSD_CTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CSD_CTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CSD_CTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CSDEN0` reader - Cascade 0 Enable"]
+pub struct CSDEN0_R(crate::FieldReader<bool, bool>);
+impl CSDEN0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDEN0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDEN0_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDEN0` writer - Cascade 0 Enable"]
+pub struct CSDEN0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDEN0_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `CSDINV0` reader - Cascade 0 Invert"]
+pub struct CSDINV0_R(crate::FieldReader<bool, bool>);
+impl CSDINV0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDINV0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDINV0_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDINV0` writer - Cascade 0 Invert"]
+pub struct CSDINV0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDINV0_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `CSDEN1` reader - Cascade 1 Enable"]
+pub struct CSDEN1_R(crate::FieldReader<bool, bool>);
+impl CSDEN1_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDEN1_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDEN1_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDEN1` writer - Cascade 1 Enable"]
+pub struct CSDEN1_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDEN1_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `CSDINV1` reader - Cascade 1 Invert"]
+pub struct CSDINV1_R(crate::FieldReader<bool, bool>);
+impl CSDINV1_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDINV1_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDINV1_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDINV1` writer - Cascade 1 Invert"]
+pub struct CSDINV1_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDINV1_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `DCASOP` reader - Dual Cascade Operation (0:AND, 1:OR)"]
+pub struct DCASOP_R(crate::FieldReader<bool, bool>);
+impl DCASOP_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        DCASOP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DCASOP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DCASOP` writer - Dual Cascade Operation (0:AND, 1:OR)"]
+pub struct DCASOP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DCASOP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `CSDTRG0` reader - Cascade 0 Enabled as Trigger"]
+pub struct CSDTRG0_R(crate::FieldReader<bool, bool>);
+impl CSDTRG0_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDTRG0_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDTRG0_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDTRG0` writer - Cascade 0 Enabled as Trigger"]
+pub struct CSDTRG0_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDTRG0_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `CSDTRG1` reader - Cascade 1 Enabled as Trigger"]
+pub struct CSDTRG1_R(crate::FieldReader<bool, bool>);
+impl CSDTRG1_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDTRG1_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDTRG1_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDTRG1` writer - Cascade 1 Enabled as Trigger"]
+pub struct CSDTRG1_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDTRG1_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `CSDEN2` reader - Cascade 2 Enable"]
+pub struct CSDEN2_R(crate::FieldReader<bool, bool>);
+impl CSDEN2_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDEN2_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDEN2_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDEN2` writer - Cascade 2 Enable"]
+pub struct CSDEN2_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDEN2_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Field `CSDINV2` reader - Cascade 2 Invert"]
+pub struct CSDINV2_R(crate::FieldReader<bool, bool>);
+impl CSDINV2_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDINV2_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDINV2_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDINV2` writer - Cascade 2 Invert"]
+pub struct CSDINV2_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDINV2_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `CSDXXX2` reader - Cascade 2 test mode"]
+pub struct CSDXXX2_R(crate::FieldReader<bool, bool>);
+impl CSDXXX2_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        CSDXXX2_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CSDXXX2_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CSDXXX2` writer - Cascade 2 test mode"]
+pub struct CSDXXX2_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CSDXXX2_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Cascade 0 Enable"]
+    #[inline(always)]
+    pub fn csden0(&self) -> CSDEN0_R {
+        CSDEN0_R::new(self.bits != 0)
+    }
+    #[doc = "Bit 1 - Cascade 0 Invert"]
+    #[inline(always)]
+    pub fn csdinv0(&self) -> CSDINV0_R {
+        CSDINV0_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Cascade 1 Enable"]
+    #[inline(always)]
+    pub fn csden1(&self) -> CSDEN1_R {
+        CSDEN1_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Cascade 1 Invert"]
+    #[inline(always)]
+    pub fn csdinv1(&self) -> CSDINV1_R {
+        CSDINV1_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Dual Cascade Operation (0:AND, 1:OR)"]
+    #[inline(always)]
+    pub fn dcasop(&self) -> DCASOP_R {
+        DCASOP_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 6 - Cascade 0 Enabled as Trigger"]
+    #[inline(always)]
+    pub fn csdtrg0(&self) -> CSDTRG0_R {
+        CSDTRG0_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Cascade 1 Enabled as Trigger"]
+    #[inline(always)]
+    pub fn csdtrg1(&self) -> CSDTRG1_R {
+        CSDTRG1_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Cascade 2 Enable"]
+    #[inline(always)]
+    pub fn csden2(&self) -> CSDEN2_R {
+        CSDEN2_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Cascade 2 Invert"]
+    #[inline(always)]
+    pub fn csdinv2(&self) -> CSDINV2_R {
+        CSDINV2_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 11 - Cascade 2 test mode"]
+    #[inline(always)]
+    pub fn csdxxx2(&self) -> CSDXXX2_R {
+        CSDXXX2_R::new(((self.bits >> 11) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Cascade 0 Enable"]
+    #[inline(always)]
+    pub fn csden0(&mut self) -> CSDEN0_W {
+        CSDEN0_W { w: self }
+    }
+    #[doc = "Bit 1 - Cascade 0 Invert"]
+    #[inline(always)]
+    pub fn csdinv0(&mut self) -> CSDINV0_W {
+        CSDINV0_W { w: self }
+    }
+    #[doc = "Bit 2 - Cascade 1 Enable"]
+    #[inline(always)]
+    pub fn csden1(&mut self) -> CSDEN1_W {
+        CSDEN1_W { w: self }
+    }
+    #[doc = "Bit 3 - Cascade 1 Invert"]
+    #[inline(always)]
+    pub fn csdinv1(&mut self) -> CSDINV1_W {
+        CSDINV1_W { w: self }
+    }
+    #[doc = "Bit 4 - Dual Cascade Operation (0:AND, 1:OR)"]
+    #[inline(always)]
+    pub fn dcasop(&mut self) -> DCASOP_W {
+        DCASOP_W { w: self }
+    }
+    #[doc = "Bit 6 - Cascade 0 Enabled as Trigger"]
+    #[inline(always)]
+    pub fn csdtrg0(&mut self) -> CSDTRG0_W {
+        CSDTRG0_W { w: self }
+    }
+    #[doc = "Bit 7 - Cascade 1 Enabled as Trigger"]
+    #[inline(always)]
+    pub fn csdtrg1(&mut self) -> CSDTRG1_W {
+        CSDTRG1_W { w: self }
+    }
+    #[doc = "Bit 8 - Cascade 2 Enable"]
+    #[inline(always)]
+    pub fn csden2(&mut self) -> CSDEN2_W {
+        CSDEN2_W { w: self }
+    }
+    #[doc = "Bit 9 - Cascade 2 Invert"]
+    #[inline(always)]
+    pub fn csdinv2(&mut self) -> CSDINV2_W {
+        CSDINV2_W { w: self }
+    }
+    #[doc = "Bit 11 - Cascade 2 test mode"]
+    #[inline(always)]
+    pub fn csdxxx2(&mut self) -> CSDXXX2_W {
+        CSDXXX2_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "The Cascade Control Register. Controls the counter external enable signals\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csd_ctrl](index.html) module"]
+pub struct CSD_CTRL_SPEC;
+impl crate::RegisterSpec for CSD_CTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [csd_ctrl::R](R) reader structure"]
+impl crate::Readable for CSD_CTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [csd_ctrl::W](W) writer structure"]
+impl crate::Writable for CSD_CTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CSD_CTRL to value 0"]
+impl crate::Resettable for CSD_CTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/ctrl.rs

@@ -0,0 +1,519 @@
+#[doc = "Register `CTRL` reader"]
+pub struct R(crate::R<CTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRL` writer"]
+pub struct W(crate::W<CTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Counter Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Counter Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+#[doc = "Field `ACTIVE` reader - Counter Active"]
+pub struct ACTIVE_R(crate::FieldReader<bool, bool>);
+impl ACTIVE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ACTIVE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ACTIVE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AUTO_DISABLE` reader - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"]
+pub struct AUTO_DISABLE_R(crate::FieldReader<bool, bool>);
+impl AUTO_DISABLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        AUTO_DISABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for AUTO_DISABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AUTO_DISABLE` writer - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"]
+pub struct AUTO_DISABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AUTO_DISABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `AUTO_DEACTIVATE` reader - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"]
+pub struct AUTO_DEACTIVATE_R(crate::FieldReader<bool, bool>);
+impl AUTO_DEACTIVATE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        AUTO_DEACTIVATE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for AUTO_DEACTIVATE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AUTO_DEACTIVATE` writer - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"]
+pub struct AUTO_DEACTIVATE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AUTO_DEACTIVATE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `IRQ_ENB` reader - Interrupt Enable"]
+pub struct IRQ_ENB_R(crate::FieldReader<bool, bool>);
+impl IRQ_ENB_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        IRQ_ENB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for IRQ_ENB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `IRQ_ENB` writer - Interrupt Enable"]
+pub struct IRQ_ENB_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> IRQ_ENB_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Counter Status Selection\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum STATUS_SEL_A {
+    #[doc = "0: Single cycle pulse when the counter reaches 0"]
+    DONE = 0,
+    #[doc = "1: Returns the counter ACTIVE bit"]
+    ACTIVE = 1,
+    #[doc = "2: Toggles the STATUS bit everytime the counter reaches 0. Basically a divide by 2 counter output."]
+    TOGGLE = 2,
+    #[doc = "3: Selects the Pulse Width Modulated output. It 1 when the counter value is >= the PWMA_VALUE"]
+    PWMA = 3,
+    #[doc = "4: Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"]
+    PWMB = 4,
+    #[doc = "5: Returns the counter ENABLED bit"]
+    ENABLED = 5,
+    #[doc = "6: Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"]
+    PWMA_ACTIVE = 6,
+}
+impl From<STATUS_SEL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: STATUS_SEL_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `STATUS_SEL` reader - Counter Status Selection"]
+pub struct STATUS_SEL_R(crate::FieldReader<u8, STATUS_SEL_A>);
+impl STATUS_SEL_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: u8) -> Self {
+        STATUS_SEL_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<STATUS_SEL_A> {
+        match self.bits {
+            0 => Some(STATUS_SEL_A::DONE),
+            1 => Some(STATUS_SEL_A::ACTIVE),
+            2 => Some(STATUS_SEL_A::TOGGLE),
+            3 => Some(STATUS_SEL_A::PWMA),
+            4 => Some(STATUS_SEL_A::PWMB),
+            5 => Some(STATUS_SEL_A::ENABLED),
+            6 => Some(STATUS_SEL_A::PWMA_ACTIVE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DONE`"]
+    #[inline(always)]
+    pub fn is_done(&self) -> bool {
+        **self == STATUS_SEL_A::DONE
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        **self == STATUS_SEL_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `TOGGLE`"]
+    #[inline(always)]
+    pub fn is_toggle(&self) -> bool {
+        **self == STATUS_SEL_A::TOGGLE
+    }
+    #[doc = "Checks if the value of the field is `PWMA`"]
+    #[inline(always)]
+    pub fn is_pwma(&self) -> bool {
+        **self == STATUS_SEL_A::PWMA
+    }
+    #[doc = "Checks if the value of the field is `PWMB`"]
+    #[inline(always)]
+    pub fn is_pwmb(&self) -> bool {
+        **self == STATUS_SEL_A::PWMB
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        **self == STATUS_SEL_A::ENABLED
+    }
+    #[doc = "Checks if the value of the field is `PWMA_ACTIVE`"]
+    #[inline(always)]
+    pub fn is_pwma_active(&self) -> bool {
+        **self == STATUS_SEL_A::PWMA_ACTIVE
+    }
+}
+impl core::ops::Deref for STATUS_SEL_R {
+    type Target = crate::FieldReader<u8, STATUS_SEL_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `STATUS_SEL` writer - Counter Status Selection"]
+pub struct STATUS_SEL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> STATUS_SEL_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: STATUS_SEL_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "Single cycle pulse when the counter reaches 0"]
+    #[inline(always)]
+    pub fn done(self) -> &'a mut W {
+        self.variant(STATUS_SEL_A::DONE)
+    }
+    #[doc = "Returns the counter ACTIVE bit"]
+    #[inline(always)]
+    pub fn active(self) -> &'a mut W {
+        self.variant(STATUS_SEL_A::ACTIVE)
+    }
+    #[doc = "Toggles the STATUS bit everytime the counter reaches 0. Basically a divide by 2 counter output."]
+    #[inline(always)]
+    pub fn toggle(self) -> &'a mut W {
+        self.variant(STATUS_SEL_A::TOGGLE)
+    }
+    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is >= the PWMA_VALUE"]
+    #[inline(always)]
+    pub fn pwma(self) -> &'a mut W {
+        self.variant(STATUS_SEL_A::PWMA)
+    }
+    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is < the PWMA_VALUE and value is > PWMA_VALUE"]
+    #[inline(always)]
+    pub fn pwmb(self) -> &'a mut W {
+        self.variant(STATUS_SEL_A::PWMB)
+    }
+    #[doc = "Returns the counter ENABLED bit"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(STATUS_SEL_A::ENABLED)
+    }
+    #[doc = "Selects the Pulse Width Modulated output. It 1 when the counter value is <= the PWMA_VALUE and value is >= 0"]
+    #[inline(always)]
+    pub fn pwma_active(self) -> &'a mut W {
+        self.variant(STATUS_SEL_A::PWMA_ACTIVE)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5);
+        self.w
+    }
+}
+#[doc = "Field `STATUS_INV` reader - Invert the Output Status"]
+pub struct STATUS_INV_R(crate::FieldReader<bool, bool>);
+impl STATUS_INV_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        STATUS_INV_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for STATUS_INV_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `STATUS_INV` writer - Invert the Output Status"]
+pub struct STATUS_INV_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> STATUS_INV_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Field `REQ_STOP` reader - Stop Request"]
+pub struct REQ_STOP_R(crate::FieldReader<bool, bool>);
+impl REQ_STOP_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        REQ_STOP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for REQ_STOP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `REQ_STOP` writer - Stop Request"]
+pub struct REQ_STOP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> REQ_STOP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Counter Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(self.bits != 0)
+    }
+    #[doc = "Bit 1 - Counter Active"]
+    #[inline(always)]
+    pub fn active(&self) -> ACTIVE_R {
+        ACTIVE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"]
+    #[inline(always)]
+    pub fn auto_disable(&self) -> AUTO_DISABLE_R {
+        AUTO_DISABLE_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"]
+    #[inline(always)]
+    pub fn auto_deactivate(&self) -> AUTO_DEACTIVATE_R {
+        AUTO_DEACTIVATE_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Interrupt Enable"]
+    #[inline(always)]
+    pub fn irq_enb(&self) -> IRQ_ENB_R {
+        IRQ_ENB_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bits 5:7 - Counter Status Selection"]
+    #[inline(always)]
+    pub fn status_sel(&self) -> STATUS_SEL_R {
+        STATUS_SEL_R::new(((self.bits >> 5) & 0x07) as u8)
+    }
+    #[doc = "Bit 8 - Invert the Output Status"]
+    #[inline(always)]
+    pub fn status_inv(&self) -> STATUS_INV_R {
+        STATUS_INV_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Stop Request"]
+    #[inline(always)]
+    pub fn req_stop(&self) -> REQ_STOP_R {
+        REQ_STOP_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Counter Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bit 2 - Auto Disables the counter (set ENABLE to 0) when the count reaches 0"]
+    #[inline(always)]
+    pub fn auto_disable(&mut self) -> AUTO_DISABLE_W {
+        AUTO_DISABLE_W { w: self }
+    }
+    #[doc = "Bit 3 - Auto Deactivate the counter (set ACTIVE to 0) when the count reaches 0"]
+    #[inline(always)]
+    pub fn auto_deactivate(&mut self) -> AUTO_DEACTIVATE_W {
+        AUTO_DEACTIVATE_W { w: self }
+    }
+    #[doc = "Bit 4 - Interrupt Enable"]
+    #[inline(always)]
+    pub fn irq_enb(&mut self) -> IRQ_ENB_W {
+        IRQ_ENB_W { w: self }
+    }
+    #[doc = "Bits 5:7 - Counter Status Selection"]
+    #[inline(always)]
+    pub fn status_sel(&mut self) -> STATUS_SEL_W {
+        STATUS_SEL_W { w: self }
+    }
+    #[doc = "Bit 8 - Invert the Output Status"]
+    #[inline(always)]
+    pub fn status_inv(&mut self) -> STATUS_INV_W {
+        STATUS_INV_W { w: self }
+    }
+    #[doc = "Bit 9 - Stop Request"]
+    #[inline(always)]
+    pub fn req_stop(&mut self) -> REQ_STOP_W {
+        REQ_STOP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
+pub struct CTRL_SPEC;
+impl crate::RegisterSpec for CTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
+impl crate::Readable for CTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
+impl crate::Writable for CTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRL to value 0"]
+impl crate::Resettable for CTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/enable.rs

@@ -0,0 +1,113 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Counter Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    #[inline(always)]
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Counter Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = value as u32;
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Counter Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(self.bits != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Counter Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/perid.rs

@@ -0,0 +1,31 @@
+#[doc = "Register `PERID` reader"]
+pub struct R(crate::R<PERID_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PERID_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PERID_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PERID_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Peripheral ID Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perid](index.html) module"]
+pub struct PERID_SPEC;
+impl crate::RegisterSpec for PERID_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [perid::R](R) reader structure"]
+impl crate::Readable for PERID_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets PERID to value 0x0011_07e1"]
+impl crate::Resettable for PERID_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x0011_07e1
+    }
+}

src/tim0/pwm_value.rs

@@ -0,0 +1,64 @@
+#[doc = "Register `PWM_VALUE` reader"]
+pub struct R(crate::R<PWM_VALUE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PWM_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PWM_VALUE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PWM_VALUE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PWM_VALUE` writer"]
+pub struct W(crate::W<PWM_VALUE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PWM_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PWM_VALUE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PWM_VALUE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "The Pulse Width Modulation Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwm_value](index.html) module"]
+pub struct PWM_VALUE_SPEC;
+impl crate::RegisterSpec for PWM_VALUE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [pwm_value::R](R) reader structure"]
+impl crate::Readable for PWM_VALUE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [pwm_value::W](W) writer structure"]
+impl crate::Writable for PWM_VALUE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PWM_VALUE to value 0"]
+impl crate::Resettable for PWM_VALUE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/pwma_value.rs

@@ -0,0 +1,64 @@
+#[doc = "Register `PWMA_VALUE` reader"]
+pub struct R(crate::R<PWMA_VALUE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PWMA_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PWMA_VALUE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PWMA_VALUE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PWMA_VALUE` writer"]
+pub struct W(crate::W<PWMA_VALUE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PWMA_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PWMA_VALUE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PWMA_VALUE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "The Pulse Width Modulation ValueA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwma_value](index.html) module"]
+pub struct PWMA_VALUE_SPEC;
+impl crate::RegisterSpec for PWMA_VALUE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [pwma_value::R](R) reader structure"]
+impl crate::Readable for PWMA_VALUE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [pwma_value::W](W) writer structure"]
+impl crate::Writable for PWMA_VALUE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PWMA_VALUE to value 0"]
+impl crate::Resettable for PWMA_VALUE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/pwmb_value.rs

@@ -0,0 +1,64 @@
+#[doc = "Register `PWMB_VALUE` reader"]
+pub struct R(crate::R<PWMB_VALUE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PWMB_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PWMB_VALUE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PWMB_VALUE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PWMB_VALUE` writer"]
+pub struct W(crate::W<PWMB_VALUE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PWMB_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PWMB_VALUE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PWMB_VALUE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "The Pulse Width Modulation ValueB\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwmb_value](index.html) module"]
+pub struct PWMB_VALUE_SPEC;
+impl crate::RegisterSpec for PWMB_VALUE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [pwmb_value::R](R) reader structure"]
+impl crate::Readable for PWMB_VALUE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [pwmb_value::W](W) writer structure"]
+impl crate::Writable for PWMB_VALUE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PWMB_VALUE to value 0"]
+impl crate::Resettable for PWMB_VALUE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

src/tim0/rst_value.rs

@@ -0,0 +1,64 @@
+#[doc = "Register `RST_VALUE` reader"]
+pub struct R(crate::R<RST_VALUE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RST_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RST_VALUE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RST_VALUE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RST_VALUE` writer"]
+pub struct W(crate::W<RST_VALUE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RST_VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RST_VALUE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RST_VALUE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "The value that counter start from after reaching 0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rst_value](index.html) module"]
+pub struct RST_VALUE_SPEC;
+impl crate::RegisterSpec for RST_VALUE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rst_value::R](R) reader structure"]
+impl crate::Readable for RST_VALUE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rst_value::W](W) writer structure"]
+impl crate::Writable for RST_VALUE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RST_VALUE to value 0"]
+impl crate::Resettable for RST_VALUE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}