This repository has been archived on 2024-06-16. You can view files and clone it, but cannot push or open issues or pull requests.
va108xx/CHANGELOG.md
Robin Mueller a5e5f02f7c
All checks were successful
Rust/va108xx-rs/pipeline/head This commit looks good
bump version to 0.2.4
2021-12-06 12:24:55 +01:00

1.4 KiB

Change Log

All notable changes to this project will be documented in this file.

The format is based on Keep a Changelog and this project adheres to Semantic Versioning.

[unreleased]

[v0.2.4]

  • Added missing bitfield CSDTRG2 in CSD_CTRL register of TIM0 peripheral

[v0.2.3]

  • Added peripheral reset fields for PERIPHERAL_RESET register

[v0.2.2]

  • README tweks

[v0.2.1]

  • Some README and Manifest weaks

[v0.2.0]

[v0.1.3]

Added

  • Added two missing bit fields for I2CA STATUS register: I2CIDLE and IDLE

Fixed

  • Made I2CA STATUS register read-only

[v0.1.2]

Fixed

[v0.1.1]

  • Relicensed under dual Apache-2.0 / MIT license

Changed

  • SVD file handling improved and new fields added for the peripheral clock enable register

Added

  • Helper script to automate all steps for PAC generation
  • Added badges for README

[v0.1.0]

Added