fast blinky

va416xx-hal/Cargo.toml

@@ -11,8 +11,9 @@ keywords = ["no-std", "hal", "cortex-m", "vorago", "va416xx"]
 categories = ["embedded", "no-std", "hardware-support"]
 
 [dependencies]
-cortex-m = "0.7"
-cortex-m-rt = "0.7.1"
+# cortex-m = "0.7"
+cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]}
+cortex-m-rt = "0.7"
 nb = "1"
 
 [dependencies.va416xx]
@@ -26,11 +27,4 @@ rt = ["va416xx/rt"]
 panic-rtt-target = { version = "0.1", features = ["cortex-m"] }
 rtt-target = { version = "0.3", features = ["cortex-m"] }
 panic-halt = "0.2"
-
-[profile.dev]
-debug = true
-lto = false
-
-[profile.release]
-lto = true
-debug = true
+#cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]}

va416xx-hal/examples/blinky.rs

@@ -2,7 +2,7 @@
 #![no_main]
 #![no_std]
 
-use cortex_m_rt::{entry};
+use cortex_m_rt::entry;
 use panic_halt as _;
 use va416xx_hal::pac;
 
@@ -11,27 +11,24 @@ const LED_PG5: u32 = 1 << 5;
 
 #[entry]
 fn main() -> ! {
-    let dp = pac::Peripherals::take().unwrap();
+    // SAFETY: Peripherals are only stolen once here.
+    let dp = unsafe { pac::Peripherals::steal() };
     // Enable all peripheral clocks
-    dp.SYSCONFIG
-        .peripheral_clk_enable
+    dp.sysconfig
+        .peripheral_clk_enable()
         .modify(|_, w| unsafe { w.bits(0xffffffff) });
-    dp.PORTG.dir().modify(|_, w| unsafe { w.bits(LED_PG5) });
-    dp.PORTG.datamask().modify(|_, w| unsafe { w.bits(LED_PG5)});
+    dp.portg.dir().modify(|_, w| unsafe { w.bits(LED_PG5) });
+    dp.portg
+        .datamask()
+        .modify(|_, w| unsafe { w.bits(LED_PG5) });
     for _ in 0..10 {
-        dp.PORTG
-            .clrout()
-            .write(|w| unsafe { w.bits(LED_PG5) });
-        cortex_m::asm::delay(5_000_000);
-        dp.PORTG
-            .setout()
-            .write(|w| unsafe { w.bits(LED_PG5) });
-        cortex_m::asm::delay(5_000_000);
+        dp.portg.clrout().write(|w| unsafe { w.bits(LED_PG5) });
+        cortex_m::asm::delay(2_000_000);
+        dp.portg.setout().write(|w| unsafe { w.bits(LED_PG5) });
+        cortex_m::asm::delay(2_000_000);
     }
     loop {
-        dp.PORTG
-        .togout()
-        .write(|w| unsafe { w.bits(LED_PG5) });
-        cortex_m::asm::delay(25_000_000);
+        dp.portg.togout().write(|w| unsafe { w.bits(LED_PG5) });
+        cortex_m::asm::delay(2_000_000);
     }
 }

va416xx-hal/src/clock.rs

@@ -1,7 +1,5 @@
-//! # API for clock related functionality
-//!
 //! This also includes functionality to enable the peripheral clocks
-use va416xx::SYSCONFIG;
+use va416xx::Sysconfig;
 
 #[derive(Copy, Clone, PartialEq)]
 pub enum PeripheralSelect {
@@ -35,17 +33,17 @@ pub enum PeripheralSelect {
     PortD = 27,
     PortE = 28,
     PortF = 29,
-    PortG = 30
+    PortG = 30,
 }
 
-pub fn enable_peripheral_clock(syscfg: &mut SYSCONFIG, clock: PeripheralSelect) {
+pub fn enable_peripheral_clock(syscfg: &mut Sysconfig, clock: PeripheralSelect) {
     syscfg
-        .peripheral_clk_enable
+        .peripheral_clk_enable()
         .modify(|r, w| unsafe { w.bits(r.bits() | (1 << clock as u8)) });
 }
 
-pub fn disable_peripheral_clock(syscfg: &mut SYSCONFIG, clock: PeripheralSelect) {
+pub fn disable_peripheral_clock(syscfg: &mut Sysconfig, clock: PeripheralSelect) {
     syscfg
-        .peripheral_clk_enable
+        .peripheral_clk_enable()
         .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << clock as u8)) });
 }