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Merge pull request 'bumped aarch32 dependencies' (#37) from bump-aarch32-crates into main
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Reviewed-on: #37
This commit was merged in pull request #37.
This commit is contained in:
Robin Müller
2026-02-02 15:40:03 +01:00
parent 7affec2cd5 0d6713f248
commit 4ec2f2bae3
22 changed files with 72 additions and 52 deletions
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firmware/examples/defmt/Cargo.toml
+1 -1
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@@ -9,7 +9,7 @@ repository = "https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs"
license = "MIT OR Apache-2.0"
[dependencies]
aarch32-cpu = { version = "0.1" }
aarch32-cpu = { version = "0.2" }
zynq7000-rt = { path = "../../zynq7000-rt" }
zynq7000 = { path = "../../zynq7000" }
zynq7000-hal = { path = "../../zynq7000-hal", features = ["defmt"] }
firmware/examples/defmt/memory.x
+5
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@@ -4,12 +4,17 @@ MEMORY
Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This is
recommended for something like DMA descriptors. */
/*CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M*/
/* CODE(rx) : ORIGIN = 0x00100000, LENGTH = 62M */
CODE(rx) : ORIGIN = 0x00000000, LENGTH = 192K
/* STACK: ORIGIN = 0x3F00000, LENGTH = 1M */
UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
OCM_UPPER(rx): ORIGIN = 0xFFFF0000, LENGTH = 64K
}
REGION_ALIAS("VECTORS", CODE);
REGION_ALIAS("DATA", CODE);
/* Use the upper OCM as the stack */
REGION_ALIAS("STACKS", OCM_UPPER);
SECTIONS
{
firmware/examples/embassy/Cargo.toml
+1 -1
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@@ -11,7 +11,7 @@ keywords = ["no-std", "arm", "cortex-a", "amd", "zynq7000"]
categories = ["embedded", "no-std", "hardware-support"]
[dependencies]
aarch32-cpu = { version = "0.1", features = ["critical-section-single-core"] }
aarch32-cpu = { version = "0.2", features = ["critical-section-single-core"] }
zynq7000-rt = { path = "../../zynq7000-rt" }
zynq7000 = { path = "../../zynq7000" }
zynq7000-hal = { path = "../../zynq7000-hal" }
firmware/examples/embassy/memory.x
+6 -4
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@@ -1,10 +1,12 @@
MEMORY
{
/* Zedboard: 512 MB DDR3. Only use 63 MB for now, should be plenty for a bare-metal app.
Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This is
recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M
/* Zedboard: 512 MB DDR3. Only use 62 MB for now, should be plenty for a bare-metal app.
1 MB stack memory and 1 MB of memory which will be configured as uncached device memory by the
MMU. This is recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 62M
STACKS : ORIGIN = 0x3F00000, LENGTH = 1M
UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
OCM_UPPER(rx): ORIGIN = 0xFFFF0000, LENGTH = 64K
}
REGION_ALIAS("VECTORS", CODE);
firmware/examples/simple/Cargo.toml
+1 -1
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@@ -9,7 +9,7 @@ repository = "https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs"
license = "MIT OR Apache-2.0"
[dependencies]
aarch32-cpu = { version = "0.1" }
aarch32-cpu = { version = "0.2" }
zynq7000-rt = { path = "../../zynq7000-rt" }
zynq7000 = { path = "../../zynq7000" }
zynq7000-hal = { path = "../../zynq7000-hal" }
firmware/examples/simple/memory.x
+6 -4
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@@ -1,10 +1,12 @@
MEMORY
{
/* Zedboard: 512 MB DDR3. Only use 63 MB for now, should be plenty for a bare-metal app.
Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This is
recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M
/* Zedboard: 512 MB DDR3. Only use 62 MB for now, should be plenty for a bare-metal app.
1 MB stack memory and 1 MB of memory which will be configured as uncached device memory by the
MMU. This is recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 62M
STACKS : ORIGIN = 0x3F00000, LENGTH = 1M
UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
OCM_UPPER(rx): ORIGIN = 0xFFFF0000, LENGTH = 64K
}
REGION_ALIAS("VECTORS", CODE);
firmware/examples/zedboard/Cargo.toml
+5 -5
View File
@@ -11,7 +11,7 @@ keywords = ["no-std", "arm", "cortex-a", "amd", "zynq7000"]
categories = ["embedded", "no-std", "hardware-support"]
[dependencies]
aarch32-cpu = { version = "0.1" }
aarch32-cpu = { version = "0.2" }
zynq7000-rt = { path = "../../zynq7000-rt" }
zynq7000 = { path = "../../zynq7000" }
zynq7000-hal = { path = "../../zynq7000-hal" }
@@ -22,23 +22,23 @@ l3gd20 = { git = "https://github.com/us-irs/l3gd20.git", branch = "add-async-if"
embedded-io = "0.7"
bitbybit = "1.4"
arbitrary-int = "2"
embedded-io-async = "0.6"
embedded-io-async = "0.7"
critical-section = "1"
static_cell = "2"
embedded-alloc = "0.6"
embedded-alloc = "0.7"
embedded-hal = "1"
embedded-hal-async = "1"
fugit = "0.3"
log = "0.4"
rand = { version = "0.9", default-features = false, features = ["small_rng"] }
embassy-executor = { git = "https://github.com/us-irs/embassy.git", branch = "cortex-ar-update", features = [
embassy-executor = { git = "https://github.com/us-irs/embassy.git", rev = "fd40f3e2f2efb67434a9e7d90eb35a30e30d1736", features = [
"arch-cortex-ar",
"executor-thread",
]}
# TODO: Remove generic-queue-16 feature as soon as upstream executor is used again.
embassy-time = { version = "0.5", features = ["tick-hz-1_000_000", "generic-queue-16"] }
embassy-net = { version = "0.7", features = ["dhcpv4", "packet-trace", "medium-ethernet", "icmp", "tcp", "udp"] }
embassy-net = { version = "0.8", features = ["dhcpv4", "packet-trace", "medium-ethernet", "icmp", "tcp", "udp"] }
embassy-sync = { version = "0.7" }
# TODO: Bump as soon as new compatible smoltcp/embassy-net version is released.
heapless = "0.8"
firmware/examples/zedboard/memory.x
+6 -4
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@@ -1,10 +1,12 @@
MEMORY
{
/* Zedboard: 512 MB DDR3. Only use 63 MB for now, should be plenty for a bare-metal app.
Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This is
recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M
/* Zedboard: 512 MB DDR3. Only use 62 MB for now, should be plenty for a bare-metal app.
1 MB stack memory and 1 MB of memory which will be configured as uncached device memory by the
MMU. This is recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 62M
STACKS : ORIGIN = 0x3F00000, LENGTH = 1M
UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
OCM_UPPER(rx): ORIGIN = 0xFFFF0000, LENGTH = 64K
}
REGION_ALIAS("VECTORS", CODE);
firmware/examples/zedboard/src/bin/ethernet.rs
+3 -3
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@@ -373,9 +373,9 @@ async fn main(spawner: Spawner) -> ! {
let tcp_socket = TcpSocket::new(stack, RX_TCP_BUFS.take(), TX_TCP_BUFS.take());
// Spawn all embassy tasks.
spawner.spawn(embassy_net_task(runner)).unwrap();
spawner.spawn(udp_task(udp_socket)).unwrap();
spawner.spawn(tcp_task(tcp_socket)).unwrap();
spawner.spawn(embassy_net_task(runner).unwrap());
spawner.spawn(udp_task(udp_socket).unwrap());
spawner.spawn(tcp_task(tcp_socket).unwrap());
let mut mio_led = Output::new_for_mio(gpio_pins.mio.mio7, PinState::Low);
firmware/examples/zedboard/src/bin/l3gd20h-spi-mio.rs
+1 -1
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@@ -155,7 +155,7 @@ async fn main(spawner: Spawner) -> ! {
}
}
spawner.spawn(logger_task(uart)).unwrap();
spawner.spawn(logger_task(uart).unwrap());
if BLOCKING {
blocking_application(mio_led, emio_leds, spi).await;
} else {
firmware/examples/zedboard/src/bin/uart-non-blocking.rs
+7 -7
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@@ -284,20 +284,20 @@ async fn main(spawner: Spawner) -> ! {
.replace(uart16550_prod);
RX_UART_0.borrow(cs).borrow_mut().replace(uart_0_rx);
});
spawner.spawn(led_task(mio_led, emio_leds)).unwrap();
spawner.spawn(led_task(mio_led, emio_leds).unwrap());
match UART_MODE {
UartMode::Uart0ToUartlite => {
spawner.spawn(uartlite_task(uartlite_tx)).unwrap();
spawner.spawn(uart_0_task(uart_0_tx)).unwrap();
spawner.spawn(uartlite_task(uartlite_tx).unwrap());
spawner.spawn(uart_0_task(uart_0_tx).unwrap());
}
UartMode::Uart0ToUart16550 => {
spawner.spawn(uart_0_task(uart_0_tx)).unwrap();
spawner.spawn(uart_16550_task(uart_16550_tx)).unwrap();
spawner.spawn(uart_0_task(uart_0_tx).unwrap());
spawner.spawn(uart_16550_task(uart_16550_tx).unwrap());
}
UartMode::UartliteToUart16550 => {
spawner.spawn(uartlite_task(uartlite_tx)).unwrap();
spawner.spawn(uart_16550_task(uart_16550_tx)).unwrap();
spawner.spawn(uartlite_task(uartlite_tx).unwrap());
spawner.spawn(uart_16550_task(uart_16550_tx).unwrap());
}
}
let mut read_buf: [u8; RB_SIZE] = [0; RB_SIZE];
firmware/zedboard-fsbl/Cargo.toml
+1 -1
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@@ -9,7 +9,7 @@ repository = "https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs"
license = "MIT OR Apache-2.0"
[dependencies]
aarch32-cpu = { version = "0.1", features = ["critical-section-single-core"] }
aarch32-cpu = { version = "0.2", features = ["critical-section-single-core"] }
zynq7000-rt = { path = "../zynq7000-rt" }
zynq7000 = { path = "../zynq7000" }
zynq7000-hal = { path = "../zynq7000-hal" }
firmware/zedboard-fsbl/memory.x
+4 -2
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@@ -1,7 +1,7 @@
MEMORY
{
/* The Zynq7000 has 192 kB of OCM memory which can be used for the FSBL */
CODE(rx) : ORIGIN = 0x00000000, LENGTH = 192K
/* The Zynq7000 has 256 kB of OCM memory of which 196 kB can be used for the FSBL */
CODE(rx) : ORIGIN = 0x00000000, LENGTH = 196K
OCM_UPPER(rx): ORIGIN = 0xFFFF0000, LENGTH = 64K
/* Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This can
be used for something like DMA descriptors, but the DDR needs to be set up first in addition
@@ -11,6 +11,8 @@ MEMORY
REGION_ALIAS("VECTORS", CODE);
REGION_ALIAS("DATA", CODE);
/* Use the upper OCM as the stack */
REGION_ALIAS("STACKS", OCM_UPPER);
SECTIONS
{
firmware/zedboard-qspi-flasher/Cargo.toml
+1 -1
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@@ -4,7 +4,7 @@ version = "0.1.0"
edition = "2024"
[dependencies]
aarch32-cpu = { version = "0.1", features = ["critical-section-single-core"] }
aarch32-cpu = { version = "0.2", features = ["critical-section-single-core"] }
zynq7000-rt = { path = "../zynq7000-rt" }
zynq7000 = { path = "../zynq7000" }
zynq7000-hal = { path = "../zynq7000-hal" }
firmware/zedboard-qspi-flasher/memory.x
+6 -4
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@@ -1,9 +1,11 @@
MEMORY
{
/* Zedboard: 512 MB DDR3. Only use 63 MB for now, should be plenty for a bare-metal app.
Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This is
recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M
/* Zedboard: 512 MB DDR3. Only use 62 MB for now, should be plenty for a bare-metal app.
1 MB stack memory and 1 MB of memory which will be configured as uncached device memory by the
MMU. This is recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 62M
OCM_UPPER(rx): ORIGIN = 0xFFFF0000, LENGTH = 64K
STACKS : ORIGIN = 0x3F00000, LENGTH = 1M
UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
}
firmware/zynq7000-hal/Cargo.toml
+1 -1
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@@ -11,7 +11,7 @@ keywords = ["no-std", "hal", "amd", "zynq7000", "bare-metal"]
categories = ["embedded", "no-std", "hardware-support"]
[dependencies]
aarch32-cpu = { version = "0.1" }
aarch32-cpu = { version = "0.2" }
zynq7000 = { path = "../zynq7000", version = "0.1" }
zynq7000-mmu = { path = "../zynq7000-mmu", version = "0.1" }
firmware/zynq7000-mmu/Cargo.toml
+1 -1
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@@ -11,7 +11,7 @@ categories = ["embedded", "no-std", "hardware-support"]
[dependencies]
thiserror = { version = "2", default-features = false }
aarch32-cpu = { version = "0.1" }
aarch32-cpu = { version = "0.2" }
[build-dependencies]
arm-targets = { version = "0.4" }
firmware/zynq7000-rt/Cargo.toml
+2 -2
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@@ -11,8 +11,8 @@ keywords = ["no-std", "rt", "cortex-a", "amd", "zynq7000"]
categories = ["embedded", "no-std", "hardware-support"]
[dependencies]
aarch32-rt = { version = "0.1", optional = true, features = ["fpu-d32"] }
aarch32-cpu = { version = "0.1" }
aarch32-rt = { version = "0.2", optional = true, features = ["fpu-d32"] }
aarch32-cpu = { version = "0.2" }
arbitrary-int = "2"
zynq7000-mmu = { path = "../zynq7000-mmu", version = "0.1" }
host/Cargo.lock
Generated
+2 -2
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@@ -4,9 +4,9 @@ version = 4
[[package]]
name = "aarch32-cpu"
version = "0.1.0"
version = "0.2.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "5db6700cf01549520abec199376115e1ceb6fde1d1de30064f0f230be8a0c305"
checksum = "1417bbf608824a44cb2fa2ad74b5ec28c0ae4c83df62a4bd2b532bf04c241ade"
dependencies = [
"arbitrary-int 2.0.0",
"arm-targets",
justfile
+1 -1
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@@ -56,4 +56,4 @@ run binary:
python3 {{justfile_directory()}}/scripts/zynq7000-init.py
# Run the GDB debugger in GUI mode.
gdb-multiarch -q -x {{justfile_directory()}}/zynq/gdb.gdb {{binary}} -tui
gdb-multiarch -q -x {{justfile_directory()}}/firmware/gdb.gdb {{binary}} -tui
scripts/memory_ddr.x
+6 -4
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@@ -1,10 +1,12 @@
MEMORY
{
/* Zedboard: 512 MB DDR3. Only use 63 MB for now, should be plenty for a bare-metal app.
Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This is
recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M
/* Zedboard: 512 MB DDR3. Only use 62 MB for now, should be plenty for a bare-metal app.
1 MB stack memory and 1 MB of memory which will be configured as uncached device memory by the
MMU. This is recommended for something like DMA descriptors. */
CODE(rx) : ORIGIN = 0x00100000, LENGTH = 62M
STACKS : ORIGIN = 0x3F00000, LENGTH = 1M
UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
OCM_UPPER(rx): ORIGIN = 0xFFFF0000, LENGTH = 64K
}
REGION_ALIAS("DATA", CODE);
scripts/memory_ocm.x
+5 -2
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@@ -1,7 +1,7 @@
MEMORY
{
/* The Zynq7000 has 192 kB of OCM memory which can be used for the FSBL */
CODE(rx) : ORIGIN = 0x00000000, LENGTH = 192K
/* The Zynq7000 has 256 kB of OCM memory of which 196 kB can be used for the FSBL */
CODE(rx) : ORIGIN = 0x00000000, LENGTH = 196K
OCM_UPPER(rx): ORIGIN = 0xFFFF0000, LENGTH = 64K
/* Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This can
be used for something like DMA descriptors, but the DDR needs to be set up first in addition
@@ -9,7 +9,10 @@ MEMORY
UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
}
REGION_ALIAS("VECTORS", CODE);
REGION_ALIAS("DATA", CODE);
/* Use the upper OCM as the stack */
REGION_ALIAS("STACKS", OCM_UPPER);
SECTIONS
{