probe-rs experiments

firmware/examples/defmt/memory.x

@@ -3,8 +3,8 @@ MEMORY
   /* Zedboard: 512 MB DDR3. Only use 63 MB for now, should be plenty for a bare-metal app.
   Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This is
   recommended for something like DMA descriptors. */
-  /*CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M*/
-  CODE(rx) : ORIGIN = 0x00000000, LENGTH = 192K
+  CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M
+  /*CODE(rx) : ORIGIN = 0x00000000, LENGTH = 192K*/
   UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
 }
 

justfile

@@ -56,4 +56,5 @@ run binary:
   python3 {{justfile_directory()}}/scripts/zynq7000-init.py
 
   # Run the GDB debugger in GUI mode.
-  gdb-multiarch -q -x {{justfile_directory()}}/zynq/gdb.gdb {{binary}} -tui
+  # gdb-multiarch -q -x {{justfile_directory()}}/zynq/gdb.gdb {{binary}} -tui
+  probe-rs run --chip X7Z --protocol jtag --skip-reset {{binary}}

probe-rs-test/Cargo.toml

@@ -0,0 +1,8 @@
+[package]
+name = "probe-rs-test"
+version = "0.1.0"
+edition = "2024"
+
+[dependencies]
+probe-rs = { path = "../../probe-rs/probe-rs" }
+anyhow = { version = "1" }

probe-rs-test/src/main.rs

@@ -0,0 +1,50 @@
+use std::{path::Path, time::Duration};
+
+use probe_rs::{
+    Permissions,
+    architecture::arm::FullyQualifiedApAddress,
+    flashing::{ElfOptions, Format, build_loader},
+    probe::list::Lister,
+    vendor::amd::sequences::x7z::AccessPort,
+};
+
+fn main() -> anyhow::Result<()> {
+    let lister = Lister::new();
+    let probes = lister.list_all();
+    let probe = probes[0].open()?;
+    let mut session = probe.attach("X7Z", Permissions::default()).unwrap();
+
+    let ap_addr = FullyQualifiedApAddress::v1_with_default_dp(AccessPort::SystemMemory as u8);
+    //mem_ap.
+    let mut core = session.core(0)?;
+    core.halt(Duration::from_millis(200))?;
+    drop(core);
+    let binary = Path::new("../firmware/target/armv7a-none-eabihf/release/defmt");
+    let format = Format::Elf(ElfOptions::default());
+    let loader = build_loader(
+        &mut session,
+        binary,
+        format,
+        Some(probe_rs::InstructionSet::A32),
+    )?;
+    let raw_builder = loader.flash_builder();
+    for segment in &raw_builder.data {
+        println!("{} bytes of data at base {:?}", segment.1.len(), segment.0);
+    }
+    let mut mem_ap = session.get_arm_interface()?.memory_interface(&ap_addr)?;
+    for segment in &raw_builder.data {
+        println!(
+            "writing {} bytes of data at base {:?}",
+            segment.1.len(),
+            segment.0
+        );
+        mem_ap.write(*segment.0, segment.1)?;
+    }
+    drop(mem_ap);
+    let mut core = session.core(0)?;
+    println!("running core");
+    core.run()?;
+    loop {
+        std::thread::sleep(Duration::from_millis(100));
+    }
+}