continue with descriptors

This commit is contained in:
Robin Müller 2025-05-28 20:40:51 +02:00
parent 42335ab8c1
commit d0d0d48780
Signed by: muellerr
GPG Key ID: A649FB78196E3849
3 changed files with 11 additions and 9 deletions

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@ -1,6 +1,6 @@
use arbitrary_int::u3;
pub use zynq7000::eth::MdcClkDiv;
use zynq7000::eth::{GEM_0_BASE_ADDR, GEM_1_BASE_ADDR, MmioEthernet, SpeedMode};
use zynq7000::eth::{MmioEthernet, SpeedMode, GEM_0_BASE_ADDR, GEM_1_BASE_ADDR};
pub use ll::{ClkConfig, EthernetLowLevel};
@ -14,11 +14,11 @@ use crate::gpio::mio::{
Mio16, Mio17, Mio18, Mio19, Mio20, Mio21, Mio22, Mio23, Mio24, Mio25, Mio26, Mio27,
};
use crate::gpio::{
IoPeriphPin,
mio::{
Mio28, Mio29, Mio30, Mio31, Mio32, Mio33, Mio34, Mio35, Mio36, Mio37, Mio38, Mio39, Mio52,
Mio53, MioPinMarker, MuxConf, Pin,
},
IoPeriphPin,
};
pub const MUX_CONF_PHY: MuxConf = MuxConf::new_with_l0();
@ -390,9 +390,11 @@ impl Ethernet {
}
}
#[bitbybit::bitenum(u1, exhaustive = true)]
#[derive(Debug, PartialEq, Eq)]
pub(crate) enum Ownership {
Hardware = 0,
Software = 1,
mod shared {
#[bitbybit::bitenum(u1, exhaustive = true)]
#[derive(Debug, PartialEq, Eq)]
pub enum Ownership {
Hardware = 0,
Software = 1,
}
}

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@ -1,5 +1,5 @@
//! RX buffer descriptor module.
pub use super::Ownership;
pub use super::shared::Ownership;
use arbitrary_int::{u2, u3, u13, u30};
/// RX buffer descriptor.

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@ -1,6 +1,6 @@
use arbitrary_int::u14;
pub use super::Ownership;
pub use super::shared::Ownership;
/// RX buffer descriptor.
///