defmt tests

zynq/.cargo/config.toml

@@ -6,11 +6,15 @@ rustflags = [
   "-Ctarget-feature=+vfp3",
   "-Ctarget-feature=+neon",
   "-Clink-arg=-Tlink.x",
+  "-Clink-arg=-Tdefmt.x",
   # If this is not enabled, debugging / stepping can become problematic.
   "-Cforce-frame-pointers=yes",
   # Can be useful for debugging.
-  # "-Clink-args=-Map=app.map"
+  "-Clink-args=-Map=app.map"
 ]
 
 [build]
 target = "armv7a-none-eabihf"
+
+[env]
+DEFMT_LOG = "info"

zynq/Cargo.toml

@@ -10,6 +10,7 @@ members = [
   "examples/simple",
   "examples/embassy",
   "examples/zedboard",
+  "examples/defmt",
 
   "zedboard-bsp",
   "zedboard-qspi-flasher",

zynq/examples/defmt/Cargo.toml

@@ -0,0 +1,21 @@
+[package]
+name = "defmt"
+version = "0.1.0"
+authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
+edition = "2024"
+description = "DEFMT test app"
+homepage = "https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs"
+repository = "https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs"
+license = "MIT OR Apache-2.0"
+
+[dependencies]
+aarch32-cpu = { version = "0.1" }
+zynq7000-rt = { path = "../../zynq7000-rt" }
+zynq7000 = { path = "../../zynq7000" }
+zynq7000-hal = { path = "../../zynq7000-hal", features = ["defmt"] }
+defmt = "1"
+defmt-rtt = "1"
+embedded-io = "0.7"
+embedded-hal = "1"
+fugit = "0.3"
+log = "0.4"

zynq/examples/defmt/memory.x

@@ -0,0 +1,24 @@
+MEMORY
+{
+  /* Zedboard: 512 MB DDR3. Only use 63 MB for now, should be plenty for a bare-metal app.
+  Leave 1 MB of memory which will be configured as uncached device memory by the MMU. This is
+  recommended for something like DMA descriptors. */
+  /*CODE(rx) : ORIGIN = 0x00100000, LENGTH = 63M*/
+  CODE(rx) : ORIGIN = 0x00000000, LENGTH = 192K
+  UNCACHED(rx): ORIGIN = 0x4000000, LENGTH = 1M
+}
+
+REGION_ALIAS("VECTORS", CODE);
+REGION_ALIAS("DATA", CODE);
+
+SECTIONS
+{
+  /* Uncached memory */
+  .uncached (NOLOAD) : ALIGN(4) {
+    . = ALIGN(4);
+    _sbss_uncached = .;
+    *(.uncached .uncached.*);
+    . = ALIGN(4);
+    _ebss_uncached = .;
+  } > UNCACHED
+}

zynq/examples/defmt/src/main.rs

@@ -0,0 +1,83 @@
+//! Simple blinky app, showing a PAC variant and a HAL variant.
+#![no_std]
+#![no_main]
+
+use aarch32_cpu::asm::nop;
+use core::panic::PanicInfo;
+use defmt_rtt as _;
+use embedded_hal::{delay::DelayNs, digital::StatefulOutputPin};
+use zynq7000_hal::{
+    InteruptConfig,
+    clocks::Clocks,
+    gpio::{Output, PinState, mio},
+    priv_tim::CpuPrivateTimer,
+    time::Hertz,
+};
+
+pub const LIB: Lib = Lib::Hal;
+
+// Define the clock frequency as a constant.
+//
+// Not required for the PAC mode, is required for clean delays in HAL mode.
+const PS_CLOCK_FREQUENCY: Hertz = Hertz::from_raw(33_333_333);
+
+#[derive(Debug)]
+pub enum Lib {
+    Pac,
+    Hal,
+}
+
+#[zynq7000_rt::entry]
+fn main() -> ! {
+    let dp = zynq7000_hal::init(zynq7000_hal::Config {
+        init_l2_cache: true,
+        level_shifter_config: Some(zynq7000_hal::LevelShifterConfig::EnableAll),
+        interrupt_config: Some(InteruptConfig::AllInterruptsToCpu0),
+    })
+    .expect("Failed to initialize Zynq7000");
+
+    defmt::println!("-- Zynq7000 defmt test application --");
+    let clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
+    defmt::info!("clocks {:?}", clocks);
+    // Unwrap okay, we only call this once on core 0 here.
+    let mut cpu_tim = CpuPrivateTimer::take(clocks.arm_clocks()).unwrap();
+    let mio_pins = mio::Pins::new(dp.gpio);
+    let mut led = Output::new_for_mio(mio_pins.mio7, PinState::High);
+    loop {
+        defmt::info!("toggling LED!");
+        led.toggle().unwrap();
+        cpu_tim.delay_ms(1000);
+    }
+}
+
+#[zynq7000_rt::irq]
+fn irq_handler() {}
+
+#[zynq7000_rt::exception(DataAbort)]
+fn data_abort_handler(_faulting_addr: usize) -> ! {
+    loop {
+        nop();
+    }
+}
+
+#[zynq7000_rt::exception(Undefined)]
+fn undefined_handler(_faulting_addr: usize) -> ! {
+    loop {
+        nop();
+    }
+}
+
+#[zynq7000_rt::exception(PrefetchAbort)]
+fn prefetch_handler(_faulting_addr: usize) -> ! {
+    loop {
+        nop();
+    }
+}
+
+/// Panic handler
+#[panic_handler]
+fn panic(_info: &PanicInfo) -> ! {
+    loop {
+        nop();
+    }
+}

zynq/zynq7000-hal/Cargo.toml

@@ -42,10 +42,12 @@ vcell = "0.1"
 raw-slicee = "0.1"
 embedded-io-async = "0.7"
 serde = { version = "1", optional = true, features = ["derive"] }
+defmt = { version = "1", optional = true }
 
 [features]
 std = ["thiserror/std", "alloc"]
 alloc = []
+defmt = ["dep:defmt", "fugit/defmt"]
 # These devices have a lower pin count.
 7z010-7z007s-clg225 = []
 

zynq/zynq7000-hal/src/clocks/mod.rs

@@ -18,6 +18,7 @@ use zynq7000::slcr::{
 use super::time::Hertz;
 
 #[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct ArmClocks {
     ref_clk: Hertz,
     cpu_1x_clk: Hertz,
@@ -50,6 +51,7 @@ impl ArmClocks {
 }
 
 #[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct DdrClocks {
     /// DDR reference clock generated by the DDR PLL.
     ref_clk: Hertz,
@@ -118,6 +120,7 @@ impl DdrClocks {
 }
 
 #[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct IoClocks {
     /// Reference clock provided by IO PLL which is used to calculate all other clock frequencies.
     ref_clk: Hertz,
@@ -199,6 +202,7 @@ impl IoClocks {
 }
 
 #[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Clocks {
     ps_clk: Hertz,
     arm_pll_out: Hertz,