rust/zynq7000-rs
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bugfix for SPI AMBA clock control
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This commit is contained in:
Robin Müller
2026-05-05 18:39:42 +02:00
parent 110adc8a63
commit f2b6b9abcf
1 changed files with 2 additions and 2 deletions
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firmware/zynq7000-hal/src/lib.rs
+2 -2
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@@ -208,7 +208,7 @@ pub fn enable_amba_peripheral_clock(select: PeriphSelect) {
PeriphSelect::Can1 => val.set_can_1_1x_clk_act(true),
PeriphSelect::Can0 => val.set_can_0_1x_clk_act(true),
PeriphSelect::Spi1 => val.set_spi_1_1x_clk_act(true),
PeriphSelect::Spi0 => val.set_spi_1_1x_clk_act(true),
PeriphSelect::Spi0 => val.set_spi_0_1x_clk_act(true),
PeriphSelect::Sdio1 => val.set_sdio_1_1x_clk_act(true),
PeriphSelect::Sdio0 => val.set_sdio_0_1x_clk_act(true),
PeriphSelect::Gem1 => val.set_gem_1_1x_clk_act(true),
@@ -241,7 +241,7 @@ pub fn disable_amba_periph_clk(select: PeriphSelect) {
PeriphSelect::Can1 => val.set_can_1_1x_clk_act(false),
PeriphSelect::Can0 => val.set_can_0_1x_clk_act(false),
PeriphSelect::Spi1 => val.set_spi_1_1x_clk_act(false),
PeriphSelect::Spi0 => val.set_spi_1_1x_clk_act(false),
PeriphSelect::Spi0 => val.set_spi_0_1x_clk_act(false),
PeriphSelect::Sdio1 => val.set_sdio_1_1x_clk_act(false),
PeriphSelect::Sdio0 => val.set_sdio_0_1x_clk_act(false),
PeriphSelect::Gem1 => val.set_gem_1_1x_clk_act(false),