level filter change
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This commit is contained in:
2025-07-14 11:35:36 +02:00
parent 29a476d132
commit f97097a92b

View File

@@ -10,30 +10,32 @@ use embassy_net::{Ipv4Cidr, StaticConfigV4};
use embassy_time::{Duration, Ticker, Timer};
use embedded_hal::digital::StatefulOutputPin;
use embedded_io::Write;
use log::{debug, error, info};
use log::{debug, error, info, LevelFilter};
use rand::{RngCore, SeedableRng};
use zedboard::{
PS_CLOCK_FREQUENCY,
phy_marvell::{LatchingLinkStatus, MARVELL_88E1518_OUI},
PS_CLOCK_FREQUENCY,
};
use zynq7000_hal::{
BootMode,
clocks::Clocks,
configure_level_shifter,
eth::{
AlignedBuffer, ClkDivCollection, EthernetConfig, EthernetLowLevel,
embassy_net::InterruptResult,
embassy_net::InterruptResult, AlignedBuffer, ClkDivCollection, EthernetConfig,
EthernetLowLevel,
},
gic::{GicConfigurator, GicInterruptHelper, Interrupt},
gpio::{GpioPins, Output, PinState},
gtc::Gtc,
uart::{ClkConfigRaw, Uart, UartConfig},
BootMode,
};
use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
use zynq7000::{slcr::LevelShifterConfig, PsPeripherals};
use zynq7000_rt::{self as _, mmu::section_attrs::SHAREABLE_DEVICE, mmu_l1_table_mut};
const INIT_STRING: &str = "-- Zynq 7000 Zedboard Ethernet Example --\n\r";
const LOG_LEVEL: LevelFilter = LevelFilter::Info;
// Unicast address with OUI of the Marvell 88E1518 PHY.
const MAC_ADDRESS: [u8; 6] = [
0x00,
@@ -185,13 +187,7 @@ async fn main(spawner: Spawner) -> ! {
.unwrap();
uart.write_all(INIT_STRING.as_bytes()).unwrap();
// Safety: We are not multi-threaded yet.
unsafe {
zynq7000_hal::log::uart_blocking::init_unsafe_single_core(
uart,
log::LevelFilter::Trace,
false,
)
};
unsafe { zynq7000_hal::log::uart_blocking::init_unsafe_single_core(uart, LOG_LEVEL, false) };
let boot_mode = BootMode::new();
info!("Boot mode: {:?}", boot_mode);