2026-04-01 14:14:56 +02:00
6 changed files with 10 additions and 4 deletions
@@ -10,7 +10,7 @@ keywords = ["no-std", "zedboard", "bare-metal", "amd", "zynq7000"]
 categories = ["embedded", "no-std", "hardware-support"]

 [dependencies]
-zynq7000 = { path = "../zynq7000", version = "0.1" }
+zynq7000 = { path = "../zynq7000", version = "0.2" }
 zynq7000-hal = { path = "../zynq7000-hal", version = "0.1" }
 bitbybit = "2"
 log = "0.4"
@@ -12,7 +12,7 @@ categories = ["embedded", "no-std", "hardware-support"]

 [dependencies]
 aarch32-cpu = { version = "0.2" }
-zynq7000 = { path = "../zynq7000", version = "0.1" }
+zynq7000 = { path = "../zynq7000", version = "0.2" }
 zynq7000-mmu = { path = "../zynq7000-mmu", version = "0.1" }
 static_assertions = "1.1"
 bitbybit = "2"
@@ -15,6 +15,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Added SDIO registers.
 - Fixed wrong position in QSPI reset register in SLCR Module
 - Added some missing reset register definitions.
+- Added `defmt` support
+- Some other minor renaming of registers (e.g. `ctrl` replaced by `control`)

 # [v0.1.1] 2025-10-09

@@ -1,6 +1,6 @@
 [package]
 name = "zynq7000"
-version = "0.1.1"
+version = "0.2.0"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2024"
 description = "Peripheral Access Crate (PAC) for the Zynq7000 family of SoCs"
@@ -8,6 +8,10 @@
 //! on top of it.
 //! [The Zynq7000 HAL library](https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs/src/branch/main/zynq/zynq7000-hal)
 //! contains such a HAL which builds on this PAC.
+//!
+//! ## Features
+//!
+//! * `defmt` - Add support for the [`defmt`](https://github.com/knurling-rs/defmt) logging library.
 #![no_std]
 #![cfg_attr(docsrs, feature(doc_cfg))]

@@ -691,7 +691,7 @@ checksum = "d6bbff5f0aada427a1e5a6da5f1f98158182f26556f345ac9e04d36d0ebed650"

 [[package]]
 name = "zynq7000"
-version = "0.1.1"
+version = "0.2.0"
 dependencies = [
 "arbitrary-int 2.0.0",
 "bitbybit 2.0.0",