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zynq7000-rs/examples/zedboard/src/bin/ethernet.rs
Robin Mueller d25c8b4ead
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2025-07-12 11:59:34 +02:00

399 lines
14 KiB
Rust

#![no_std]
#![no_main]
use core::{cell::RefCell, mem::MaybeUninit, panic::PanicInfo};
use cortex_ar::asm::nop;
use embassy_executor::Spawner;
use embassy_time::{Duration, Ticker, Timer};
use embedded_hal::digital::StatefulOutputPin;
use embedded_io::Write;
use log::{error, info};
use rand::{RngCore, SeedableRng};
use zedboard::{PS_CLOCK_FREQUENCY, phy_marvell::LatchingLinkStatus};
use zynq7000_hal::{
BootMode,
clocks::Clocks,
configure_level_shifter,
eth::{
AlignedBuffer, ClkConfigCollection, EthernetConfig, EthernetLowLevel,
embassy_net::InterruptResult,
},
gic::{GicConfigurator, GicInterruptHelper, Interrupt},
gpio::{GpioPins, Output, PinState},
gtc::Gtc,
uart::{ClkConfigRaw, Uart, UartConfig},
};
use zynq7000::{PsPeripherals, slcr::LevelShifterConfig};
use zynq7000_rt::{self as _, mmu::section_attrs::SHAREABLE_DEVICE, mmu_l1_table_mut};
const INIT_STRING: &str = "-- Zynq 7000 Zedboard Ethernet Example --\n\r";
const MAC_ADDRESS: [u8; 6] = [0x01, 0x02, 0x03, 0x04, 0x05, 0x06];
#[unsafe(link_section = ".uncached")]
static RX_DESCRIPTORS: static_cell::ConstStaticCell<
MaybeUninit<[zynq7000_hal::eth::rx_descr::Descriptor; 32]>,
> = static_cell::ConstStaticCell::new(MaybeUninit::uninit());
#[unsafe(link_section = ".uncached")]
static TX_DESCRIPTORS: static_cell::ConstStaticCell<
MaybeUninit<[zynq7000_hal::eth::tx_descr::Descriptor; 32]>,
> = static_cell::ConstStaticCell::new(MaybeUninit::uninit());
const NUM_RX_BUFS: usize = 32;
const NUM_TX_BUFS: usize = 32;
static ETH_RX_BUFS: static_cell::ConstStaticCell<[AlignedBuffer; NUM_RX_BUFS]> =
static_cell::ConstStaticCell::new([AlignedBuffer([0; zynq7000_hal::eth::MTU]); NUM_RX_BUFS]);
static ETH_TX_BUFS: static_cell::ConstStaticCell<[AlignedBuffer; NUM_TX_BUFS]> =
static_cell::ConstStaticCell::new([AlignedBuffer([0; zynq7000_hal::eth::MTU]); NUM_TX_BUFS]);
/*
static ETH_ERR_QUEUE: static_cell::ConstStaticCell<
embassy_sync::channel::Channel<
embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex,
InterruptResult,
8,
>,
> = static_cell::ConstStaticCell::new(embassy_sync::channel::Channel::new());
*/
static ETH_ERR_QUEUE: embassy_sync::channel::Channel<
embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex,
InterruptResult,
8,
> = embassy_sync::channel::Channel::new();
/*
static ETH_ERR_SENDER: critical_section::Mutex<
RefCell<
Option<
embassy_sync::channel::Sender<
'static,
embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex,
InterruptResult,
8,
>,
>,
>,
> = critical_section::Mutex::new(RefCell::new(None));
*/
/// See memory.x file. 1 MB starting at this address will be configured as uncached memory using the
/// MMU.
const UNCACHED_ADDR: u32 = 0x4000000;
/// Entry point (not called like a normal main function)
#[unsafe(no_mangle)]
pub extern "C" fn boot_core(cpu_id: u32) -> ! {
if cpu_id != 0 {
panic!("unexpected CPU ID {}", cpu_id);
}
main();
}
#[embassy_executor::task]
async fn embassy_net_task(
mut runner: embassy_net::Runner<'static, zynq7000_hal::eth::embassy_net::Driver>,
) -> ! {
runner.run().await
}
#[embassy_executor::task]
async fn led_task(mut mio_led: Output) -> ! {
let mut ticker = Ticker::every(Duration::from_millis(200));
loop {
mio_led.toggle().unwrap();
ticker.next().await; // Wait for the next cycle of the ticker
}
}
#[derive(Debug, PartialEq, Eq)]
pub enum IpMode {
LinkDown,
AutoNegotiating,
AwaitingIpConfig,
StackReady,
}
#[embassy_executor::main]
#[unsafe(export_name = "main")]
async fn main(spawner: Spawner) -> ! {
// Configure the uncached memory region using the MMU.
mmu_l1_table_mut()
.update(UNCACHED_ADDR, SHAREABLE_DEVICE)
.expect("configuring uncached memory section failed");
// Enable PS-PL level shifters.
configure_level_shifter(LevelShifterConfig::EnableAll);
let dp = PsPeripherals::take().unwrap();
// Clock was already initialized by PS7 Init TCL script or FSBL, we just read it.
let clocks = Clocks::new_from_regs(PS_CLOCK_FREQUENCY).unwrap();
// Set up the global interrupt controller.
let mut gic = GicConfigurator::new_with_init(dp.gicc, dp.gicd);
gic.enable_all_interrupts();
gic.set_all_spi_interrupt_targets_cpu0();
gic.enable();
unsafe {
gic.enable_interrupts();
}
let mut gpio_pins = GpioPins::new(dp.gpio);
// Set up global timer counter and embassy time driver.
let gtc = Gtc::new(dp.gtc, clocks.arm_clocks());
zynq7000_embassy::init(clocks.arm_clocks(), gtc);
// Set up the UART, we are logging with it.
let uart_clk_config = ClkConfigRaw::new_autocalc_with_error(clocks.io_clocks(), 115200)
.unwrap()
.0;
let mut uart = Uart::new_with_mio(
dp.uart_1,
UartConfig::new_with_clk_config(uart_clk_config),
(gpio_pins.mio.mio48, gpio_pins.mio.mio49),
)
.unwrap();
uart.write_all(INIT_STRING.as_bytes()).unwrap();
// Safety: We are not multi-threaded yet.
unsafe {
zynq7000_hal::log::uart_blocking::init_unsafe_single_core(
uart,
log::LevelFilter::Trace,
false,
)
};
let boot_mode = BootMode::new();
info!("Boot mode: {:?}", boot_mode);
let rx_bufs = ETH_RX_BUFS.take();
let tx_bufs = ETH_TX_BUFS.take();
let rx_descr = RX_DESCRIPTORS.take();
let tx_descr = TX_DESCRIPTORS.take();
rx_descr.write([const { zynq7000_hal::eth::rx_descr::Descriptor::new() }; 32]);
tx_descr.write([const { zynq7000_hal::eth::tx_descr::Descriptor::new() }; 32]);
let rx_descr_init = unsafe { rx_descr.assume_init_mut() };
let tx_descr_init = unsafe { tx_descr.assume_init_mut() };
// Unwraps okay, list length is not 0
let mut rx_descr_ref =
zynq7000_hal::eth::rx_descr::DescriptorList::new(rx_descr_init.as_mut_slice()).unwrap();
// Create an unsafe copy for error handling.
// let rx_descr_copy_for_error_handling = unsafe { rx_descr_ref.clone_unchecked() };
let mut tx_descr_ref =
zynq7000_hal::eth::tx_descr::DescriptorList::new(tx_descr_init.as_mut_slice());
rx_descr_ref.init_with_aligned_bufs(rx_bufs.as_slice());
tx_descr_ref.init_or_reset();
// Unwrap okay, this is a valid peripheral.
let eth_ll = EthernetLowLevel::new(dp.eth_0).unwrap();
let (clk_collection, clk_errors) =
ClkConfigCollection::calculate_for_rgmii_and_io_clock(clocks.io_clocks());
info!(
"Calculated RGMII clock configuration: {:?}, errors (missmatch from ideal rate in hertz): {:?}",
clk_collection, clk_errors
);
// Unwrap okay, we use a standard clock config, and the clock config should never fail.
let eth_cfg = EthernetConfig::new(
clk_collection.cfg_100_mbps,
zynq7000_hal::eth::calculate_mdc_clk_div(clocks.arm_clocks()).unwrap(),
MAC_ADDRESS,
);
// Configures all the physical pins for ethernet operation and sets up the
// ethernet peripheral.
let mut eth = zynq7000_hal::eth::Ethernet::new_with_mio(
eth_ll,
eth_cfg,
gpio_pins.mio.mio16,
gpio_pins.mio.mio21,
(
gpio_pins.mio.mio17,
gpio_pins.mio.mio18,
gpio_pins.mio.mio19,
gpio_pins.mio.mio20,
),
gpio_pins.mio.mio22,
gpio_pins.mio.mio27,
(
gpio_pins.mio.mio23,
gpio_pins.mio.mio24,
gpio_pins.mio.mio25,
gpio_pins.mio.mio26,
),
Some((gpio_pins.mio.mio52, gpio_pins.mio.mio53)),
);
eth.set_rx_buf_descriptor_base_address(rx_descr_ref.base_addr());
eth.set_tx_buf_descriptor_base_address(tx_descr_ref.base_addr());
let (mut phy, phy_rev) =
zedboard::phy_marvell::Marvell88E1518Phy::new_autoprobe_addr(eth.mdio_mut()).unwrap();
info!(
"Detected Marvell 88E1518 PHY with revision number: {:?}",
phy_rev
);
phy.reset();
phy.restart_auto_negotiation();
// TODO:
// 1. PHY configuration.
// 2. Interrupt handler for ethernet RX and TX. Need to pass the buffers and descriptors
// to the interrupt handler.
// 3. Create embassy-net driver and schedule it.
//
let bufs = zynq7000_hal::eth::embassy_net::DescriptorsAndBuffers::new(
rx_descr_ref,
rx_bufs,
tx_descr_ref,
tx_bufs,
)
.unwrap();
let driver = zynq7000_hal::eth::embassy_net::Driver::new(&eth, MAC_ADDRESS, bufs);
let config = embassy_net::Config::dhcpv4(Default::default());
static RESOURCES: static_cell::StaticCell<embassy_net::StackResources<3>> =
static_cell::StaticCell::new();
let mut rng = rand::rngs::SmallRng::seed_from_u64(1);
let (stack, runner) = embassy_net::new(
driver,
config,
RESOURCES.init(embassy_net::StackResources::new()),
rng.next_u64(),
);
//let eth_err_queue = ETH_ERR_QUEUE.take();
//let mut receiver = eth_err_queue.sender();
/*
let receiver = eth_err_queue.receiver();
critical_section::with(|cs| {
let mut sender_ref = ETH_ERR_SENDER.borrow(cs).borrow_mut();
sender_ref.replace(sender);
});
*/
spawner.spawn(embassy_net_task(runner)).unwrap();
let mut mio_led = Output::new_for_mio(gpio_pins.mio.mio7, PinState::Low);
//spawner.spawn(led_task(mio_led)).unwrap();
let mut _emio_leds: [Output; 8] = [
Output::new_for_emio(gpio_pins.emio.take(0).unwrap(), PinState::Low),
Output::new_for_emio(gpio_pins.emio.take(1).unwrap(), PinState::Low),
Output::new_for_emio(gpio_pins.emio.take(2).unwrap(), PinState::Low),
Output::new_for_emio(gpio_pins.emio.take(3).unwrap(), PinState::Low),
Output::new_for_emio(gpio_pins.emio.take(4).unwrap(), PinState::Low),
Output::new_for_emio(gpio_pins.emio.take(5).unwrap(), PinState::Low),
Output::new_for_emio(gpio_pins.emio.take(6).unwrap(), PinState::Low),
Output::new_for_emio(gpio_pins.emio.take(7).unwrap(), PinState::Low),
];
let mut ip_mode = IpMode::LinkDown;
loop {
while let Ok(msg) = ETH_ERR_QUEUE.try_receive() {}
match ip_mode {
// Assuming that auto-negotiation is performed automatically.
IpMode::LinkDown => {
mio_led.set_low();
zynq7000_hal::eth::embassy_net::update_link_state(
embassy_net::driver::LinkState::Down,
);
ip_mode = IpMode::AutoNegotiating;
}
IpMode::AutoNegotiating => {
let status = phy.read_copper_status();
if status.auto_negotiation_complete() {
let extended_status = phy.read_copper_specific_status_register_1();
eth.configure_clock_and_speed_duplex(
// If this has the reserved bits, what do we even do? For this example app,
// I am going to assume this never happens..
extended_status.speed().as_zynq7000_eth_speed().unwrap(),
extended_status.duplex().as_zynq7000_eth_duplex(),
&clk_collection,
);
zynq7000_hal::eth::embassy_net::update_link_state(
embassy_net::driver::LinkState::Up,
);
ip_mode = IpMode::AwaitingIpConfig;
} else {
Timer::after_millis(100).await;
}
}
IpMode::AwaitingIpConfig => {
// TODO: Timeout, check for link down periodically.
stack.wait_config_up().await;
let network_config = stack.config_v4();
info!("Network configuration is up: DHCP config: {network_config:?}!",);
ip_mode = IpMode::StackReady;
mio_led.set_high();
}
IpMode::StackReady => {
let status = phy.read_copper_status();
if status.copper_link_status() == LatchingLinkStatus::DownSinceLastRead {
ip_mode = IpMode::LinkDown;
continue;
}
// Now what? maybe UDP Server?
info!("stack is ready");
Timer::after_millis(100).await;
}
}
}
}
#[unsafe(no_mangle)]
pub extern "C" fn _irq_handler() {
let mut gic_helper = GicInterruptHelper::new();
let irq_info = gic_helper.acknowledge_interrupt();
match irq_info.interrupt() {
Interrupt::Sgi(_) => (),
Interrupt::Ppi(ppi_interrupt) => {
if ppi_interrupt == zynq7000_hal::gic::PpiInterrupt::GlobalTimer {
unsafe {
zynq7000_embassy::on_interrupt();
}
}
}
Interrupt::Spi(spi_interrupt) => {
if spi_interrupt == zynq7000_hal::gic::SpiInterrupt::Eth0 {
let result = zynq7000_hal::eth::embassy_net::on_interrupt(
zynq7000_hal::eth::EthernetId::Eth0,
);
if result.has_anomalies() || result.has_errors() {
ETH_ERR_QUEUE.try_send(result).ok();
/*
let sender_ref = ETH_ERR_SENDER.borrow(cs).borrow_mut();
let sender_mut = sender_ref.unwrap();
sender_mut.try_send(result).ok();
*/
}
// TODO: Send the result structure back to the main thread.
}
}
Interrupt::Invalid(_) => (),
Interrupt::Spurious => (),
}
gic_helper.end_of_interrupt(irq_info);
}
#[unsafe(no_mangle)]
pub extern "C" fn _abort_handler() {
loop {
nop();
}
}
#[unsafe(no_mangle)]
pub extern "C" fn _undefined_handler() {
loop {
nop();
}
}
#[unsafe(no_mangle)]
pub extern "C" fn _prefetch_handler() {
loop {
nop();
}
}
/// Panic handler
#[panic_handler]
fn panic(info: &PanicInfo) -> ! {
error!("Panic: {info:?}");
loop {}
}