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commit 120e50299b
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed May 10 14:24:39 2023 +0200

    update IP core handler

commit a13687a7dc
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed May 10 14:21:05 2023 +0200

    update AXI PTME config code

commit c137df64ab
Merge: a919b3d1 4179e8e1
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:38:52 2023 +0200

    Merge remote-tracking branch 'origin/main' into update_ptme_code

commit 4179e8e124
Merge: 26f5eff6 51f9d5e1
Author: Robin Müller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:35:54 2023 +0200

    Merge pull request 'This bugfix might be super important' (#621) from possible_bugfix_dual_lane_assy into main

    Reviewed-on: #621
    Reviewed-by: Marius Eggert <eggertm@irs.uni-stuttgart.de>
    Reviewed-by: Steffen Gaisser <gaisser@irs.uni-stuttgart.de>

commit 51f9d5e1fe
Merge: a17f57cb 26f5eff6
Author: Robin Müller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:35:10 2023 +0200

    Merge branch 'main' into possible_bugfix_dual_lane_assy

commit a17f57cbb5
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:34:45 2023 +0200

    changelog

commit 26f5eff6d5
Merge: 4074e084 8a0f13ba
Author: Robin Müller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:32:03 2023 +0200

    Merge pull request 'More System Modes' (#612) from more-system-modes into main

    Reviewed-on: #612

commit 8a0f13bafb
Merge: 14baa356 4074e084
Author: Robin Müller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:31:51 2023 +0200

    Merge branch 'main' into more-system-modes

commit 14baa3563c
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:30:09 2023 +0200

    hello

commit 7045b6034a
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:18:47 2023 +0200

    changelog

commit 37b9615525
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:18:16 2023 +0200

    changelog

commit 4074e08480
Merge: 862a4f26 38686ac3
Author: Robin Müller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:12:46 2023 +0200

    Merge pull request 'Adaption for EM: Add P60 dock without ACU' (#620) from adaption_em_p60_dock_without_acu into main

    Reviewed-on: #620
    Reviewed-by: Marius Eggert <eggertm@irs.uni-stuttgart.de>

commit 23796345d9
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 15:04:30 2023 +0200

    changelog and stop payload tracking

commit b10275ca43
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 14:28:05 2023 +0200

    changelog

commit 383849c5cb
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 14:25:14 2023 +0200

    that is more robust

commit c66cef9129
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 14:23:21 2023 +0200

    changelog

commit 02ea8a7298
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 14:22:21 2023 +0200

    changelog

commit 38686ac3f6
Merge: 189a3126 74d5d709
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 14:04:03 2023 +0200

    Merge branch 'possible_bugfix_dual_lane_assy' into adaption_em_p60_dock_without_acu

commit 74d5d70973
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 13:58:08 2023 +0200

    this bugfix might be super important

commit 48355e8263
Merge: 5691fe8e 862a4f26
Author: Robin Müller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 10:25:50 2023 +0200

    Merge branch 'main' into more-system-modes

commit 189a312628
Merge: a1279428 862a4f26
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 10:23:46 2023 +0200

    Merge remote-tracking branch 'origin/main' into adaption_em_p60_dock_without_acu

commit a12794281b
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 10:20:31 2023 +0200

    changelog

commit fcaabb4e42
Merge: 6c326489 4aafca64
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 10:20:02 2023 +0200

    Merge remote-tracking branch 'origin/main' into adaption_em_p60_dock_without_acu

commit 6c326489cb
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 10:18:46 2023 +0200

    adapt EM SW: GS PCDU added, but use dummy for ACU

commit 862a4f2685
Merge: 4aafca64 2daca272
Author: Robin Müller <muellerr@irs.uni-stuttgart.de>
Date:   Fri Apr 28 09:37:55 2023 +0200

    Merge pull request 'Host SW bugfixes' (#618) from try_fix_host_obsw into main

    Reviewed-on: #618
    Reviewed-by: Marius Eggert <eggertm@irs.uni-stuttgart.de>

commit 5691fe8e72
Merge: 097be17a 4aafca64
Author: meggert <eggertm@irs.uni-stuttgart.de>
Date:   Thu Apr 27 15:40:31 2023 +0200

    Merge branch 'main' into more-system-modes

commit 2daca272f8
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Thu Apr 27 11:29:18 2023 +0200

    changelog

commit 03762f9620
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 17:38:06 2023 +0200

    lower live TM handler frequency

commit a296f16e5c
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 17:36:38 2023 +0200

    host SW works properly again

commit 83f07a6e16
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 17:26:32 2023 +0200

    configurable event manager queue depth

commit 00dab64628
Merge: 641b8e84 4aafca64
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 17:03:35 2023 +0200

    Merge remote-tracking branch 'origin/main' into try_fix_host_obsw

commit 4aafca64a6
Merge: f271242d 6901eae8
Author: Robin Müller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 17:03:01 2023 +0200

    Merge pull request 'EM adaptions' (#619) from em_adaptions into main

    Reviewed-on: #619

commit 6901eae816
Merge: 7d630ebc f271242d
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 17:02:24 2023 +0200

    Merge remote-tracking branch 'origin/main' into em_adaptions

commit 7d630ebcf3
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 17:00:04 2023 +0200

    EM adaptions

commit 641b8e847d
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 16:41:40 2023 +0200

    add back tm funnel handler for hosted build

commit 1314268682
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 16:23:50 2023 +0200

    host build requires dedicated live TM task..

commit 4040304ef0
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 13:15:42 2023 +0200

    this is annoying

commit a919b3d164
Merge: e22f2a53 9672d6d6
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 11:11:30 2023 +0200

    Merge remote-tracking branch 'origin/develop' into update_ptme_code

commit 9672d6d6cc
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 11:11:09 2023 +0200

    changelog

commit e22f2a53ea
Merge: b076e80b 0eb6b7cc
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 11:05:58 2023 +0200

    Merge remote-tracking branch 'origin/develop' into update_ptme_code

commit b076e80b44
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 11:04:10 2023 +0200

    changelog

commit 269aa6f7b0
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 11:03:42 2023 +0200

    changelog

commit caae2b4ba9
Author: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date:   Wed Apr 26 11:02:24 2023 +0200

    update PTME code

commit 097be17a29
Author: meggert <eggertm@irs.uni-stuttgart.de>
Date:   Wed Apr 19 15:07:21 2023 +0200

    added remaining acs modes as system modes
This commit is contained in:
Robin Müller
2023-05-12 09:17:05 +02:00
parent 7e6c25901b
commit 00e98a2fd6
6 changed files with 79 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

75
linux/ipcore/AxiPtmeConfig.cpp
View File

@ -32,7 +32,7 @@ ReturnValue_t AxiPtmeConfig::writeCaduRateReg(uint8_t rateVal) {
sif::warning << "AxiPtmeConfig::writeCaduRateReg: Failed to lock mutex" << std::endl;
return returnvalue::FAILED;
}
*(baseAddress + CADU_BITRATE_REG) = static_cast<uint32_t>(rateVal);
*(baseAddress + ADDR_CADU_BITRATE_REG) = static_cast<uint32_t>(rateVal);
result = mutex->unlockMutex();
if (result != returnvalue::OK) {
sif::warning << "AxiPtmeConfig::writeCaduRateReg: Failed to unlock mutex" << std::endl;
@ -42,27 +42,27 @@ ReturnValue_t AxiPtmeConfig::writeCaduRateReg(uint8_t rateVal) {
}
void AxiPtmeConfig::enableTxclockManipulator() {
writeBit(COMMON_CONFIG_REG, true, BitPos::EN_TX_CLK_MANIPULATOR);
writeBit(ADDR_COMMON_CONFIG_REG, true, BitPos::EN_TX_CLK_MANIPULATOR);
}
void AxiPtmeConfig::disableTxclockManipulator() {
writeBit(COMMON_CONFIG_REG, false, BitPos::EN_TX_CLK_MANIPULATOR);
writeBit(ADDR_COMMON_CONFIG_REG, false, BitPos::EN_TX_CLK_MANIPULATOR);
}
void AxiPtmeConfig::enableTxclockInversion() {
writeBit(COMMON_CONFIG_REG, true, BitPos::INVERT_CLOCK);
writeBit(ADDR_COMMON_CONFIG_REG, true, BitPos::INVERT_CLOCK);
}
void AxiPtmeConfig::disableTxclockInversion() {
writeBit(COMMON_CONFIG_REG, false, BitPos::INVERT_CLOCK);
writeBit(ADDR_COMMON_CONFIG_REG, false, BitPos::INVERT_CLOCK);
}
void AxiPtmeConfig::enableBatPriorityBit() {
writeBit(COMMON_CONFIG_REG, true, BitPos::EN_BAT_PRIORITY);
writeBit(ADDR_COMMON_CONFIG_REG, true, BitPos::EN_BAT_PRIORITY);
}
void AxiPtmeConfig::disableBatPriorityBit() {
writeBit(COMMON_CONFIG_REG, false, BitPos::EN_BAT_PRIORITY);
writeBit(ADDR_COMMON_CONFIG_REG, false, BitPos::EN_BAT_PRIORITY);
}
void AxiPtmeConfig::writeReg(uint32_t regOffset, uint32_t writeVal) {
@ -75,21 +75,62 @@ uint32_t AxiPtmeConfig::readReg(uint32_t regOffset) {
return *(baseAddress + regOffset / ADRESS_DIVIDER);
}
void AxiPtmeConfig::writePollThreshold(AxiPtmeConfig::IdlePollThreshold pollThreshold) {
uint32_t regVal = readCommonCfgReg();
void AxiPtmeConfig::writePollThreshold(uint8_t vcIdx,
AxiPtmeConfig::IdlePollThreshold pollThreshold) {
uint32_t regVal = readVcCfgReg(vcIdx);
// Clear bits first
regVal &= ~(0b111 << 3);
regVal |= (static_cast<uint8_t>(pollThreshold) << 3);
writeCommonCfgReg(regVal);
regVal &= ~(0b111 << 13);
regVal |= (static_cast<uint8_t>(pollThreshold) << 13);
writeVcCfgReg(vcIdx, regVal);
}
AxiPtmeConfig::IdlePollThreshold AxiPtmeConfig::readPollThreshold() {
uint32_t regVal = readCommonCfgReg();
return static_cast<AxiPtmeConfig::IdlePollThreshold>((regVal >> 3) & 0b111);
AxiPtmeConfig::IdlePollThreshold AxiPtmeConfig::readPollThreshold(uint8_t vcIdx) {
uint32_t regVal = readVcCfgReg(vcIdx);
return static_cast<AxiPtmeConfig::IdlePollThreshold>((regVal >> 13) & 0b111);
}
void AxiPtmeConfig::writeCommonCfgReg(uint32_t value) { writeReg(COMMON_CONFIG_REG, value); }
uint32_t AxiPtmeConfig::readCommonCfgReg() { return readReg(COMMON_CONFIG_REG); }
void AxiPtmeConfig::writeCommonCfgReg(uint32_t value) { writeReg(ADDR_COMMON_CONFIG_REG, value); }
uint32_t AxiPtmeConfig::readCommonCfgReg() { return readReg(ADDR_COMMON_CONFIG_REG); }
uint32_t AxiPtmeConfig::readVcCfgReg(uint8_t vcIdx) {
switch (vcIdx) {
case (0): {
return readReg(ADDR_VC0_REG);
}
case (1): {
return readReg(ADDR_VC1_REG);
}
case (2): {
return readReg(ADDR_VC2_REG);
}
case (3): {
return readReg(ADDR_VC3_REG);
}
}
return 0;
}
void AxiPtmeConfig::writeVcCfgReg(uint8_t vcIdx, uint32_t reg) {
switch (vcIdx) {
case (0): {
writeReg(ADDR_VC0_REG, reg);
break;
}
case (1): {
writeReg(ADDR_VC1_REG, reg);
break;
}
case (2): {
writeReg(ADDR_VC2_REG, reg);
break;
}
case (3): {
writeReg(ADDR_VC3_REG, reg);
break;
}
}
}
void AxiPtmeConfig::writeBit(uint32_t regOffset, bool bitVal, BitPos bitPos) {
uint32_t readVal = readReg(regOffset);

17
linux/ipcore/AxiPtmeConfig.h
View File

@ -67,14 +67,20 @@ class AxiPtmeConfig : public SystemObject {
void enableBatPriorityBit();
void disableBatPriorityBit();
void writePollThreshold(IdlePollThreshold pollThreshold);
IdlePollThreshold readPollThreshold();
void writePollThreshold(uint8_t vcIdx, IdlePollThreshold pollThreshold);
IdlePollThreshold readPollThreshold(uint8_t vcIdx);
private:
// Address of register storing the bitrate configuration parameter
static const uint32_t CADU_BITRATE_REG = 0x0;
static const uint32_t ADDR_CADU_BITRATE_REG = 0;
// Address of register storing common configuration parameters
static const uint32_t COMMON_CONFIG_REG = 0x4;
static const uint32_t ADDR_COMMON_CONFIG_REG = 4;
static const uint32_t ADDR_FRAME_LENGTH_REG = 8;
static const uint32_t ADDR_VC0_REG = 12;
static const uint32_t ADDR_VC1_REG = 16;
static const uint32_t ADDR_VC2_REG = 20;
static const uint32_t ADDR_VC3_REG = 24;
static const uint32_t ADRESS_DIVIDER = 4;
enum class BitPos : uint32_t { EN_TX_CLK_MANIPULATOR = 0, INVERT_CLOCK = 1, EN_BAT_PRIORITY = 2 };
@ -106,6 +112,9 @@ class AxiPtmeConfig : public SystemObject {
uint32_t readCommonCfgReg();
void writeCommonCfgReg(uint32_t value);
uint32_t readVcCfgReg(uint8_t vcIdx);
void writeVcCfgReg(uint8_t vcIdx, uint32_t reg);
/**
* @brief Sets one bit in a register
*

6
linux/ipcore/PtmeConfig.cpp
View File

@ -50,6 +50,8 @@ void PtmeConfig::enableBatPriorityBit(bool enable) {
}
}
void PtmeConfig::setPollThreshold(AxiPtmeConfig::IdlePollThreshold pollThreshold) {
axiPtmeConfig->writePollThreshold(pollThreshold);
void PtmeConfig::setAllPollThresholds(AxiPtmeConfig::IdlePollThreshold pollThreshold) {
for (uint8_t idx = 0; idx < 4; idx++) {
axiPtmeConfig->writePollThreshold(idx, pollThreshold);
}
}

2
linux/ipcore/PtmeConfig.h
View File

@ -64,7 +64,7 @@ class PtmeConfig : public SystemObject {
*/
void enableBatPriorityBit(bool enable);
void setPollThreshold(AxiPtmeConfig::IdlePollThreshold pollThreshold);
void setAllPollThresholds(AxiPtmeConfig::IdlePollThreshold pollThreshold);
private:
static const uint8_t INTERFACE_ID = CLASS_ID::RATE_SETTER;