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6f9a1853ff
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host compiling again
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2021-05-17 16:37:29 +02:00 |
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e337f97e62
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solved merge conflicts
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2021-05-12 17:01:11 +02:00 |
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79a5847b67
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Sus handler complete
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2021-05-12 16:38:20 +02:00 |
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48af7ef0fb
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sus delay implementation
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2021-05-12 13:06:56 +02:00 |
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50d9365702
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changed SusHandler MAX1227 to internal clock mode
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2021-05-10 11:13:39 +02:00 |
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189bdb7c90
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working SUS in externally clocked mode
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2021-05-09 16:48:55 +02:00 |
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906c813e4c
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write setup byte and conversions
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2021-05-09 14:46:42 +02:00 |
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07d337c6ad
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this works with q7s and new sus
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2021-05-09 14:39:56 +02:00 |
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95f09469d1
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this works with the old SUS
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2021-05-09 12:09:39 +02:00 |
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451729b103
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this worked with the prototype SUS
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2021-05-09 10:06:36 +02:00 |
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6861cd399e
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some tries to get data from max1227 in externally clocked mode
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2021-05-08 22:49:21 +02:00 |
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f4eb5d81ba
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save before making change in spicomif
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2021-05-07 18:48:42 +02:00 |
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931c17e971
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save before implementing SusHandler with chip select
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2021-05-06 18:00:58 +02:00 |
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80b32331c9
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rad sensor working
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2021-05-03 13:35:16 +02:00 |
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ff4a156a45
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rad sensor working
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2021-05-03 12:49:14 +02:00 |
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a126812a23
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another try to read out the adc
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2021-05-03 12:05:19 +02:00 |
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8d2993f88d
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rad sensor change wip
|
2021-05-03 11:59:33 +02:00 |
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b708028c61
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spi decoder callbacks wip
|
2021-05-02 13:48:39 +02:00 |
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fef6cf4abe
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Merge branch 'meier/master' into meier/max1227Handler
|
2021-04-30 09:04:20 +02:00 |
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34ad009707
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integrated gyro and mgm handler
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2021-04-29 17:45:19 +02:00 |
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f0075f7789
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max1227 wip
|
2021-04-29 10:40:11 +02:00 |
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0430579795
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basic structure for ILH PLOC control
|
2021-04-27 17:34:50 +02:00 |
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73d56559c3
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added PLOC sequence count. Not tested yet
|
2021-04-27 12:18:04 +02:00 |
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c5aced2070
|
fixed conflicts
|
2021-04-26 17:59:26 +02:00 |
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d63c825c7f
|
fixed merge conflicts
|
2021-04-26 17:50:36 +02:00 |
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ebdc492ed1
|
self test wip
|
2021-04-26 14:25:23 +02:00 |
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4c146b27c9
|
corrections in plocHandler, endianness
|
2021-04-26 11:28:19 +02:00 |
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bbb50e4b4f
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imqt base functions
|
2021-04-26 07:56:02 +02:00 |
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ec76222907
|
added wiretapping mode check in handleDeviceTm of PlocHandler
|
2021-04-25 15:54:48 +02:00 |
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84a0935f63
|
get commanded dipole wip
|
2021-04-25 15:53:44 +02:00 |
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|
56c0c551cb
|
imqt wip
|
2021-04-25 12:47:41 +02:00 |
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1a45d54383
|
fixed merge conflicts
|
2021-04-25 10:51:59 +02:00 |
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766c460629
|
merged mueller master
|
2021-04-25 09:33:21 +02:00 |
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3befba560c
|
adaptions for new fsfw, using pus c now
|
2021-04-24 23:04:17 +02:00 |
|
Martin Zietz
|
2c40bf86fb
|
typo fix
|
2021-04-24 14:55:15 +02:00 |
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c54eccfe43
|
tc mem write and tc mem read implemented
|
2021-04-22 17:32:39 +02:00 |
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a973d67d07
|
changes in plocDefinitions and plocHandler
|
2021-04-19 17:17:22 +02:00 |
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|
|
cc075844fd
|
wip
|
2021-04-16 18:59:48 +02:00 |
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e2242ed526
|
plocHandler wip
|
2021-04-15 13:17:15 +02:00 |
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67cc196169
|
plocHandler wip
|
2021-04-12 10:16:59 +02:00 |
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5909d4811b
|
plocHandler wip
|
2021-04-11 12:04:13 +02:00 |
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08351bcda2
|
added more spi test code, preprocessor defines
and various bugfixes
|
2021-04-02 15:14:08 +02:00 |
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|
|
9cec3f4b1a
|
fixes in imqt
|
2021-03-29 16:40:14 +02:00 |
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|
5179954176
|
ploc handler wip
|
2021-03-29 14:37:52 +02:00 |
|
|
|
34ef313ab0
|
imqt handler compiled
|
2021-03-26 13:55:32 +01:00 |
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|
|
d953a9ff32
|
fixed merge conflicts
|
2021-03-26 12:30:24 +01:00 |
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|
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d764b77a83
|
transition delay set to 5000 again
|
2021-03-25 17:15:54 +01:00 |
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0b4dac0e3d
|
rtd handler improvements
|
2021-03-24 12:53:25 +01:00 |
|
Martin Zietz
|
88138af39d
|
solved all merge conflicts
|
2021-03-22 13:09:06 +01:00 |
|
Martin Zietz
|
f01656df4c
|
deleted polling sequence file
|
2021-03-22 12:47:45 +01:00 |
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