Commit Graph

94 Commits

Author SHA1 Message Date
64bb0ae242 adis handler continued 2021-05-24 20:57:12 +02:00
33554899ae adis handler continued 2021-05-24 20:33:59 +02:00
bb75a74011 test pst 2021-05-24 01:20:44 +02:00
cca4e49bed added empty definitions file 2021-05-24 00:31:47 +02:00
9ccd0d2e72
moved fsfwconfig into linux folder 2021-05-17 20:03:56 +02:00
da17ec22fb
generated event translation files 2021-05-17 19:39:35 +02:00
2d170a1f61 sus delay implementation 2021-05-12 13:06:56 +02:00
e1e69539ca changed SusHandler MAX1227 to internal clock mode 2021-05-10 11:13:39 +02:00
fab28904de working SUS in externally clocked mode 2021-05-09 16:48:55 +02:00
98387a6d24 this works with q7s and new sus 2021-05-09 14:39:56 +02:00
eeb8167cdc this worked with the prototype SUS 2021-05-09 10:06:36 +02:00
be29d0e71f some tries to get data from max1227 in externally clocked mode 2021-05-08 22:49:21 +02:00
1eb9909377 save before making change in spicomif 2021-05-07 18:48:42 +02:00
5ce0a63ad6 save before implementing SusHandler with chip select 2021-05-06 18:00:58 +02:00
3c6ec68faa rad sensor working 2021-05-03 13:35:16 +02:00
f708a67fa8 rad sensor change wip 2021-05-03 11:59:33 +02:00
b873831645 spi decoder callbacks wip 2021-05-02 13:48:39 +02:00
f2caa84098 Merge branch 'meier/master' into meier/max1227Handler 2021-04-30 09:04:20 +02:00
8509e15736 integrated gyro and mgm handler 2021-04-29 17:45:19 +02:00
ed6eea82c5 max1227 wip 2021-04-29 10:40:11 +02:00
255313d165 added PLOC sequence count. Not tested yet 2021-04-27 12:18:04 +02:00
ac0cd39f86 fixed merge conflicts 2021-04-26 17:50:36 +02:00
4e8a6b65ec self test wip 2021-04-26 14:25:23 +02:00
cdde3e29a8 corrections in plocHandler, endianness 2021-04-26 11:28:19 +02:00
ad48d5888d imqt base functions 2021-04-26 07:56:02 +02:00
191f4b6d0c get commanded dipole wip 2021-04-25 15:53:44 +02:00
a0a5c4c8aa tc mem write and tc mem read implemented 2021-04-22 17:32:39 +02:00
7c28b2a0bc changes in plocDefinitions and plocHandler 2021-04-19 17:17:22 +02:00
b0e8a8624a wip 2021-04-16 18:59:48 +02:00
0916ca87d9 plocHandler wip 2021-04-15 13:17:15 +02:00
5d4c2bd521 plocHandler wip 2021-04-12 10:16:59 +02:00
400f60c7be plocHandler wip 2021-04-11 12:04:13 +02:00
eee73f46c5 fixes in imqt 2021-03-29 16:40:14 +02:00
be9d11afff imqt handler compiled 2021-03-26 13:55:32 +01:00
1492d168d8 fixed merge conflicts 2021-03-26 12:30:24 +01:00
Martin Zietz
862a546637 deleted polling sequence file 2021-03-22 12:47:45 +01:00
6ec4d22a14 IMTQ dipole actuation command, wip 2021-03-19 15:33:43 +01:00
c3a3394c8a IMQT wip 2021-03-17 11:14:48 +01:00
e048d6d7ec rtd handler compiled 2021-03-13 14:42:30 +01:00
dfec824222 L3DG20H device handler tested 2021-03-07 14:06:29 +01:00
b1dc0122b7 using big endian now for gyro 2021-03-07 12:53:10 +01:00
b75eef7c51 fixed merge conflict and copied max13865 code 2021-03-05 12:57:42 +01:00
93636426b6 moved some files 2021-03-04 18:29:28 +01:00
be4977df68 syrlinks hk handler complete 2021-03-01 12:23:39 +01:00
e4f3eb0172 added readout of some tx registers 2021-02-27 11:07:42 +01:00
Martin Zietz
5d24627c91 adapter size of rx registers reply 2021-02-25 15:25:49 +01:00
e7d4d7b4ee who am i reg is now checked 2021-02-24 11:24:31 +01:00
9bdc2096b0 syrlinks handler ready for testing 2021-02-22 09:24:42 +01:00
13c75ed9c2 save before removing approach with rememberCommandId 2021-02-19 15:41:50 +01:00
d8c1ad7f71 syrlinks handler wip 2021-02-19 11:02:27 +01:00