Commit Graph

123 Commits

Author SHA1 Message Date
17d187d4b0
generated header file as well 2021-05-17 19:12:25 +02:00
99acbccf84
generated translation file 2021-05-17 19:03:37 +02:00
ed2c7a2ec1
q7s compiling 2021-05-17 16:53:06 +02:00
b11ca551c7
host compiling again 2021-05-17 16:37:29 +02:00
fd9d6c6180
common config files 2021-05-17 16:22:51 +02:00
33c229d08a all sus initialized 2021-05-13 13:17:12 +02:00
44bde15a46 solved merge conflicts 2021-05-12 17:01:11 +02:00
65d0c1fabf Sus handler complete 2021-05-12 16:38:20 +02:00
2d170a1f61 sus delay implementation 2021-05-12 13:06:56 +02:00
a6465c42ba save before changing to internally clocked mode 2021-05-09 18:18:27 +02:00
fab28904de working SUS in externally clocked mode 2021-05-09 16:48:55 +02:00
950eab2373 this works with the old SUS 2021-05-09 12:09:39 +02:00
be29d0e71f some tries to get data from max1227 in externally clocked mode 2021-05-08 22:49:21 +02:00
1eb9909377 save before making change in spicomif 2021-05-07 18:48:42 +02:00
5ce0a63ad6 save before implementing SusHandler with chip select 2021-05-06 18:00:58 +02:00
f708a67fa8 rad sensor change wip 2021-05-03 11:59:33 +02:00
b873831645 spi decoder callbacks wip 2021-05-02 13:48:39 +02:00
8509e15736 integrated gyro and mgm handler 2021-04-29 17:45:19 +02:00
ea2b1fbda4 basic structure for ILH PLOC control 2021-04-27 17:34:50 +02:00
ac0cd39f86 fixed merge conflicts 2021-04-26 17:50:36 +02:00
191f4b6d0c get commanded dipole wip 2021-04-25 15:53:44 +02:00
1472c3754d fsfw update 2021-04-25 11:33:32 +02:00
c2a366e449 fixed merge conflicts 2021-04-25 10:51:59 +02:00
053e5f6e92 merged mueller master 2021-04-25 09:33:21 +02:00
3902951a70 Merge branch 'mueller/master' into meier/mgtHandler 2021-04-25 00:06:04 +02:00
24a3b11d62 everything seems to work now 2021-04-24 23:41:27 +02:00
5cf2338f09 adaptions for new fsfw, using pus c now 2021-04-24 23:04:17 +02:00
1e1446c40e issue with poolManager.subscribe in max handler 2021-04-24 22:55:26 +02:00
0916ca87d9 plocHandler wip 2021-04-15 13:17:15 +02:00
5d4c2bd521 plocHandler wip 2021-04-12 10:16:59 +02:00
0b9ae5e4ec common versioning file 2021-04-11 12:25:23 +02:00
400f60c7be plocHandler wip 2021-04-11 12:04:13 +02:00
437f4573b5 added more spi test code, preprocessor defines
and various bugfixes
2021-04-02 15:14:08 +02:00
2dbe893197 added device handler 2021-04-02 13:25:37 +02:00
ffa11ce253 pushed stuff 2021-04-01 17:19:12 +02:00
e79a8e0926 now its compiling 2021-04-01 16:33:30 +02:00
aa606b031a fixes 2021-04-01 16:21:24 +02:00
248c381ade Merge branch 'mueller/master' into meier/max13865pt1000Handler 2021-04-01 15:34:28 +02:00
29d8c8c0c8 one missing zeros 2021-04-01 15:22:16 +02:00
Martin Zietz
0027a43315 polling sequence table entries for acs devices 2021-04-01 15:32:43 +02:00
2b3d531e5d moved spi code to fsfw_hal 2021-04-01 10:59:36 +02:00
1492d168d8 fixed merge conflicts 2021-03-26 12:30:24 +01:00
887a47f7f5 imtq instantiation 2021-03-26 12:08:37 +01:00
Martin Zietz
04d0beac4c added all max handler 2021-03-25 13:10:48 +01:00
df723b26a1 rtd handler improvements 2021-03-24 12:53:25 +01:00
4bf1206fbd using new fsfw_hal now 2021-03-23 16:45:07 +01:00
Martin Zietz
e44773fee3 solved all merge conflicts 2021-03-22 13:09:06 +01:00
Martin Zietz
862a546637 deleted polling sequence file 2021-03-22 12:47:45 +01:00
c3a3394c8a IMQT wip 2021-03-17 11:14:48 +01:00
e048d6d7ec rtd handler compiled 2021-03-13 14:42:30 +01:00