Jakob Meier
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63965e2f68
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enabled rx lines of syrlinks rs485 transceiver chips
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2021-11-21 13:59:18 +01:00 |
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Jakob Meier
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556a3986c1
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pdec handler
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2021-11-01 12:41:20 +01:00 |
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0237a22ae9
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using old names again
EIVE/eive-obsw/pipeline/head This commit looks good
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2021-10-13 15:42:55 +02:00 |
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7c673d6e7f
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bugfixes in max31685, indexing adapted
EIVE/eive-obsw/pipeline/head This commit looks good
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2021-10-12 17:55:36 +02:00 |
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Jakob Meier
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5da2a45881
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gpios to enable rs485 tx clock and tx data
EIVE/eive-obsw/pipeline/head This commit looks good
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2021-10-08 14:15:33 +02:00 |
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Jakob Meier
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d54e2276d6
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ccsds handler wip
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2021-09-22 16:54:55 +02:00 |
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3354f2a696
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acd board tests continued
EIVE/eive-obsw/pipeline/head This commit looks good
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2021-09-13 18:07:07 +02:00 |
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94979e3561
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pulling reset pin gnss high
EIVE/eive-obsw/pipeline/head This commit looks good
EIVE/eive-obsw/pipeline/pr-develop This commit looks good
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2021-09-02 20:27:12 +02:00 |
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2f72b4e42a
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cleaned up
EIVE/eive-obsw/pipeline/head This commit looks good
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2021-08-17 19:50:48 +02:00 |
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9790b395e6
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include replacements
EIVE/eive-obsw/pipeline/head This commit looks good
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2021-08-03 15:58:01 +02:00 |
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b3dfbcf7fe
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removed fsfw_hal
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2021-07-15 19:06:57 +02:00 |
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8e98de6f3c
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added spi mux functionality to the rwSpiCallback
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2021-07-01 10:53:50 +02:00 |
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Martin Zietz
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8284ebec9f
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rw wip
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2021-06-24 12:04:36 +02:00 |
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51dba9f2e9
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rw chip select decoding
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2021-06-21 17:15:19 +02:00 |
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33a55d7114
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RwHandler first commands
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2021-06-21 09:50:26 +02:00 |
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6fa9b65345
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compile failure
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2021-05-27 14:04:33 +02:00 |
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623f52398e
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moved fsfwconfig into linux folder
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2021-05-17 20:03:56 +02:00 |
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