v1.9.0 #175
@ -17,7 +17,8 @@ static constexpr char UART_GNSS_0_DEV[] = "/dev/ttyUL0";
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static constexpr char UART_GNSS_1_DEV[] = "/dev/ttyUL2";
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static constexpr char UART_GNSS_1_DEV[] = "/dev/ttyUL2";
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static constexpr char UIO_PDEC_REGISTERS[] = "/dev/uio0";
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static constexpr char UIO_PDEC_REGISTERS[] = "/dev/uio0";
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static constexpr char UIO_PDEC_MEMORY[] = "/dev/uio2";
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static constexpr char UIO_PDEC_CONFIG_MEMORY[] = "/dev/uio2";
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static constexpr char UIO_PDEC_RAM[] = "/dev/uio3";
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namespace gpioNames {
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namespace gpioNames {
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static constexpr char GYRO_0_ADIS_CS[] = "gyro_0_adis_chip_select";
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static constexpr char GYRO_0_ADIS_CS[] = "gyro_0_adis_chip_select";
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@ -961,7 +961,8 @@ void ObjectFactory::createCcsdsComponents(LinuxLibgpioIF *gpioComIF) {
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gpioComIF->addGpios(gpioCookiePdec);
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gpioComIF->addGpios(gpioCookiePdec);
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new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, gpioComIF, gpioIds::PDEC_RESET,
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new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, gpioComIF, gpioIds::PDEC_RESET,
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std::string(q7s::UIO_PDEC_MEMORY), std::string(q7s::UIO_PDEC_REGISTERS));
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std::string(q7s::UIO_PDEC_CONFIG_MEMORY), std::string(q7s::UIO_PDEC_RAM),
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std::string(q7s::UIO_PDEC_REGISTERS));
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#if BOARD_TE0720 == 0
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#if BOARD_TE0720 == 0
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GpioCookie* gpioRS485Chip = new GpioCookie;
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GpioCookie* gpioRS485Chip = new GpioCookie;
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@ -22,6 +22,9 @@ void PdecConfig::initialize() {
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configWords[0] = word;
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configWords[0] = word;
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word = 0;
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word = 0;
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word |= (NEGATIVE_WINDOW << 24);
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word |= (NEGATIVE_WINDOW << 24);
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word |= (HIGH_AU_MAP_ID << 16);
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word |= (ENABLE_DERANDOMIZER << 8);
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configWords[1] = word;
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}
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}
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uint32_t PdecConfig::getConfigWord(uint8_t wordNo) {
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uint32_t PdecConfig::getConfigWord(uint8_t wordNo) {
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@ -39,6 +39,8 @@ private:
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// Set here for future use
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// Set here for future use
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static const uint8_t POSITIVE_WINDOW = 10;
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static const uint8_t POSITIVE_WINDOW = 10;
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static const uint8_t NEGATIVE_WINDOW = 151;
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static const uint8_t NEGATIVE_WINDOW = 151;
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static const uint8_t HIGH_AU_MAP_ID = 0xF;
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static const uint8_t ENABLE_DERANDOMIZER = 1;
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static const uint8_t CONFIG_WORDS_NUM = 2;
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static const uint8_t CONFIG_WORDS_NUM = 2;
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@ -1,4 +1,5 @@
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#include <cstring>
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#include <cstring>
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#include <sstream>
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#include <sys/mman.h>
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#include <sys/mman.h>
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#include <fcntl.h>
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#include <fcntl.h>
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@ -10,10 +11,11 @@
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#include "fsfw/objectmanager/ObjectManager.h"
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#include "fsfw/objectmanager/ObjectManager.h"
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PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId,
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PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId,
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LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, std::string uioMemory,
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LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, std::string uioConfigMemory,
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std::string uioRegisters) :
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std::string uioRamMemory, std::string uioRegisters) :
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SystemObject(objectId), tcDestinationId(tcDestinationId), gpioComIF(gpioComIF), pdecReset(
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SystemObject(objectId), tcDestinationId(tcDestinationId), gpioComIF(gpioComIF), pdecReset(
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pdecReset), uioMemory(uioMemory), uioRegisters(uioRegisters) {
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pdecReset), uioConfigMemory(uioConfigMemory), uioRamMemory(uioRamMemory), uioRegisters(
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uioRegisters) {
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}
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}
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@ -43,7 +45,12 @@ ReturnValue_t PdecHandler::initialize() {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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result = getMemoryBaseAddress();
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result = getConfigMemoryBaseAddress();
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if (result != RETURN_OK) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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result = getRamBaseAddress();
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if (result != RETURN_OK) {
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if (result != RETURN_OK) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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@ -76,45 +83,62 @@ ReturnValue_t PdecHandler::getRegisterAddress() {
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return RETURN_OK;
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return RETURN_OK;
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}
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}
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ReturnValue_t PdecHandler::getMemoryBaseAddress() {
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ReturnValue_t PdecHandler::getConfigMemoryBaseAddress() {
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int fd = open(uioMemory.c_str(), O_RDWR);
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int fd = open(uioConfigMemory.c_str(), O_RDWR);
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if (fd < 1) {
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if (fd < 1) {
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sif::warning << "PdecHandler::getMemoryBaseAddress: Invalid UIO device file" << std::endl;
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sif::warning << "PdecHandler::getConfigMemoryBaseAddress: Invalid UIO device file" << std::endl;
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return RETURN_FAILED;
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return RETURN_FAILED;
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}
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}
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memoryBaseAddress = static_cast<uint32_t*>(mmap(NULL, MEMORY_MAP_SIZE, PROT_WRITE | PROT_READ,
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memoryBaseAddress = static_cast<uint32_t*>(mmap(NULL, CONFIG_MEMORY_MAP_SIZE, PROT_WRITE | PROT_READ,
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MAP_SHARED, fd, 0));
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MAP_SHARED, fd, 0));
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if (memoryBaseAddress == MAP_FAILED) {
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if (memoryBaseAddress == MAP_FAILED) {
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sif::error << "PdecHandler::getMemoryBaseAddress: Failed to map uio address" << std::endl;
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sif::error << "PdecHandler::getConfigMemoryBaseAddress: Failed to map uio address" << std::endl;
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return RETURN_FAILED;
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return RETURN_FAILED;
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}
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}
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return RETURN_OK;
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return RETURN_OK;
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}
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}
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ReturnValue_t PdecHandler::getRamBaseAddress() {
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int fd = open(uioRamMemory.c_str(), O_RDWR);
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ramBaseAddress = static_cast<uint32_t*>(mmap(NULL, RAM_MAP_SIZE, PROT_WRITE | PROT_READ,
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MAP_SHARED, fd, 0));
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if (ramBaseAddress == MAP_FAILED) {
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sif::error << "PdecHandler::getRamBaseAddress: Failed to map RAM base address" << std::endl;
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return RETURN_FAILED;
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}
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return RETURN_OK;
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}
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void PdecHandler::writePdecConfig() {
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void PdecHandler::writePdecConfig() {
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PdecConfig pdecConfig;
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PdecConfig pdecConfig;
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*memoryBaseAddress = pdecConfig.getConfigWord(0);
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*(memoryBaseAddress + FRAME_HEADER_OFFSET)= pdecConfig.getConfigWord(0);
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*(memoryBaseAddress + 1) = pdecConfig.getConfigWord(1);
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*(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1);
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// uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
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// Configure all MAP IDs as invalid
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// Configure all MAP IDs as invalid
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for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
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for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
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*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) = NO_DESTINATION << 24
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*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx + 1 / 4) = NO_DESTINATION << 24
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| NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION;
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| NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION;
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// *(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) = routeToPm << 24
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// | routeToPm << 16 | routeToPm << 8 | routeToPm;
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}
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}
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// All TCs with MAP ID 7 will be routed to the PM module (can then be read from memory)
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// All TCs with MAP ID 7 will be routed to the PM module (can then be read from memory)
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uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
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uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
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*(memoryBaseAddress + 1) = NO_DESTINATION << 24 | NO_DESTINATION << 16 | NO_DESTINATION << 8
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*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + 1) = (NO_DESTINATION << 24) | (NO_DESTINATION << 16) | (NO_DESTINATION << 8)
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| routeToPm;
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| routeToPm;
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// Write map id clock frequencies
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for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
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*(memoryBaseAddress + MAP_CLK_FREQ_OFFSET + idx / 4) = MAP_CLK_FREQ << 24
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| MAP_CLK_FREQ << 16 | MAP_CLK_FREQ << 8 | MAP_CLK_FREQ;
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}
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}
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}
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ReturnValue_t PdecHandler::resetFarStatFlag() {
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ReturnValue_t PdecHandler::resetFarStatFlag() {
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@ -173,9 +197,6 @@ ReturnValue_t PdecHandler::performOperation(uint8_t operationCode) {
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bool PdecHandler::newTcReceived() {
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bool PdecHandler::newTcReceived() {
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uint32_t pdecFar = *(registerBaseAddress + PDEC_FAR_OFFSET);
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uint32_t pdecFar = *(registerBaseAddress + PDEC_FAR_OFFSET);
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sif::debug << "PdecHandler::newTcReceived: pdecFar 0x" << std::hex
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<< static_cast<unsigned int>(pdecFar) << std::endl;
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if (pdecFar >> STAT_POSITION != NEW_FAR_RECEIVED) {
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if (pdecFar >> STAT_POSITION != NEW_FAR_RECEIVED) {
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return false;
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return false;
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}
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}
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@ -303,11 +324,12 @@ void PdecHandler::handleNewTc() {
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if (result != RETURN_OK) {
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if (result != RETURN_OK) {
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return;
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return;
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}
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}
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#if OBSW_DEBUG_PDEC == 1
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#if OBSW_DEBUG_PDEC_HANDLER == 1
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unsigned int mapId = tcSegment[0] & MAP_ID_MASK;
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unsigned int mapId = tcSegment[0] & MAP_ID_MASK;
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sif::debug << "PdecHandler::handleNewTc: Received TC segment with map ID" << mapId
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sif::debug << "PdecHandler::handleNewTc: Received TC segment with map ID" << mapId
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<< std::endl;
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<< std::endl;
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#endif /* OBSW_DEBUG_PDEC */
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printTC(tcLength);
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#endif /* OBSW_DEBUG_PDEC_HANDLER */
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store_address_t storeId;
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store_address_t storeId;
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result = tcStore->addData(&storeId, tcSegment + 1, tcLength - 1);
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result = tcStore->addData(&storeId, tcSegment + 1, tcLength - 1);
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@ -331,18 +353,17 @@ void PdecHandler::handleNewTc() {
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}
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}
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ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
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ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
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uint32_t tcOffset = *(registerBaseAddress + PDEC_BPTR_OFFSET) - PHYSICAL_BASE_ADDRESS;
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uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - PHYSICAL_RAM_BASE_ADDRESS) / 4;
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#if OBSW_DEBUG_PDEC == 1
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#if OBSW_DEBUG_PDEC_HANDLER == 1
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sif::debug << "PdecHandler::readTc: TC offset: " << std::hex << tcOffset << std::endl;
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sif::debug << "PdecHandler::readTc: TC offset: 0x" << std::hex << tcOffset << std::endl;
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#endif /* OBSW_DEBUG_PDEC */
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#endif /* OBSW_DEBUG_PDEC_HANDLER */
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uint32_t* tcPtr = reinterpret_cast<uint32_t*>(*(registerBaseAddress + tcOffset) / 4);
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tcLength = *(registerBaseAddress + PDEC_SLEN_OFFSET);
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tcLength = *(registerBaseAddress + PDEC_SLEN_OFFSET);
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#if OBSW_DEBUG_PDEC == 1
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#if OBSW_DEBUG_PDEC_HANDLER == 1
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sif::debug << "PdecHandler::readTc: TC length: " << tcLength << std::endl;
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sif::debug << "PdecHandler::readTc: TC segment length: " << std::dec << tcLength << std::endl;
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#endif /* OBSW_DEBUG_PDEC */
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#endif /* OBSW_DEBUG_PDEC_HANDLER */
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if (tcLength > MAX_TC_SEGMENT_SIZE) {
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if (tcLength > MAX_TC_SEGMENT_SIZE) {
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sif::warning << "PdecHandler::handleNewTc: Read invalid TC length from PDEC register"
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sif::warning << "PdecHandler::handleNewTc: Read invalid TC length from PDEC register"
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@ -352,9 +373,31 @@ ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
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uint32_t idx = 0;
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uint32_t idx = 0;
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uint32_t tcData = 0;
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uint32_t tcData = 0;
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for (idx = 0; idx < tcLength; idx = idx + 4) {
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for (idx = 0; idx <= tcLength; idx = idx + 4) {
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tcData = *(tcPtr + idx);
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tcData = *(ramBaseAddress + tcOffset + idx / 4);
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std::memcpy(tcSegment + idx, &tcData, sizeof(tcData));
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if (idx == 0) {
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tcSegment[idx] = static_cast<uint8_t>((tcData >> 16) & 0xFF);
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tcSegment[idx + 1] = static_cast<uint8_t>((tcData >> 8) & 0xFF);
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tcSegment[idx + 2] = static_cast<uint8_t>(tcData & 0xFF);
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}
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else if (tcLength - idx + 1 == 3) {
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tcSegment[idx - 1] = static_cast<uint8_t>((tcData >> 16) & 0xFF);
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tcSegment[idx] = static_cast<uint8_t>((tcData >> 8) & 0xFF);
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tcSegment[idx + 1] = static_cast<uint8_t>(tcData & 0xFF);
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}
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else if (tcLength - idx + 1 == 2) {
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tcSegment[idx - 1] = static_cast<uint8_t>((tcData >> 8) & 0xFF);
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tcSegment[idx + 1] = static_cast<uint8_t>(tcData & 0xFF);
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}
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else if (tcLength - idx + 1 == 1) {
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tcSegment[idx - 1] = static_cast<uint8_t>(tcData & 0xFF);
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}
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else {
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tcSegment[idx - 1] = static_cast<uint8_t>((tcData >> 24) & 0xFF);
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tcSegment[idx] = static_cast<uint8_t>((tcData >> 16) & 0xFF);
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tcSegment[idx + 1] = static_cast<uint8_t>((tcData >> 8) & 0xFF);
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tcSegment[idx + 2] = static_cast<uint8_t>(tcData & 0xFF);
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}
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}
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}
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// Backend buffer is handled back to PDEC3
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// Backend buffer is handled back to PDEC3
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@ -363,6 +406,16 @@ ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
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return RETURN_OK;
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return RETURN_OK;
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}
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}
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void PdecHandler::printTC(uint32_t tcLength) {
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std::stringstream tcSegmentStream;
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tcSegmentStream << "TC segment data: 0x";
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for (uint32_t idx = 0; idx < tcLength; idx++) {
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tcSegmentStream << std::setfill('0') << std::setw(2) << std::hex
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<< static_cast<unsigned int>(tcSegment[idx]);
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}
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sif::debug << tcSegmentStream.str() << std::endl;
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}
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uint8_t PdecHandler::calcMapAddrEntry(uint8_t moduleId) {
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uint8_t PdecHandler::calcMapAddrEntry(uint8_t moduleId) {
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uint8_t lutEntry = 0;
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uint8_t lutEntry = 0;
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uint8_t parity = getOddParity(moduleId | (1 << VALID_POSITION));
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uint8_t parity = getOddParity(moduleId | (1 << VALID_POSITION));
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@ -37,11 +37,12 @@ public:
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* @param tcDestinationId Object ID of object responsible for processing TCs.
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* @param tcDestinationId Object ID of object responsible for processing TCs.
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* @param gpioComIF Pointer to GPIO interace responsible for driving GPIOs.
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* @param gpioComIF Pointer to GPIO interace responsible for driving GPIOs.
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* @param pdecReset GPIO ID of GPIO connected to the reset signal of the PDEC.
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* @param pdecReset GPIO ID of GPIO connected to the reset signal of the PDEC.
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* @param uioMemory String of uio device file same mapped to the PDEC memory space
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* @param uioConfigMemory String of uio device file same mapped to the PDEC memory space
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* @param uioregsiters String of uio device file same mapped to the PDEC register space
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* @param uioregsiters String of uio device file same mapped to the PDEC register space
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*/
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*/
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PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF,
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PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF,
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gpioId_t pdecReset, std::string uioMemory, std::string uioRegisters);
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gpioId_t pdecReset, std::string uioConfigMemory, std::string uioRamMemory,
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std::string uioRegisters);
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virtual ~PdecHandler();
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virtual ~PdecHandler();
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@ -104,14 +105,19 @@ private:
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static const uint32_t PDEC_BPTR_OFFSET = 0xA25;
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static const uint32_t PDEC_BPTR_OFFSET = 0xA25;
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static const uint32_t PDEC_SLEN_OFFSET = 0xA26;
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static const uint32_t PDEC_SLEN_OFFSET = 0xA26;
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static const int MEMORY_MAP_SIZE = 0xF42400;
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static const int CONFIG_MEMORY_MAP_SIZE = 0x400;
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static const int RAM_MAP_SIZE = 0x4000;
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static const int REGISTER_MAP_SIZE = 0x10000;
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static const int REGISTER_MAP_SIZE = 0x10000;
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// 0x200 / 4 = 0x80
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static const uint32_t FRAME_HEADER_OFFSET = 0x80;
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static const size_t MAX_TC_SEGMENT_SIZE = 1017;
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static const size_t MAX_TC_SEGMENT_SIZE = 1017;
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||||||
static const uint8_t MAP_ID_MASK = 0x3F;
|
static const uint8_t MAP_ID_MASK = 0x3F;
|
||||||
|
|
||||||
static const uint32_t PHYSICAL_BASE_ADDRESS = 0x30000000;
|
static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x32000000;
|
||||||
static const uint32_t MAP_ADDR_LUT_OFFSET = 0xA0;
|
static const uint32_t MAP_ADDR_LUT_OFFSET = 0xA0;
|
||||||
|
static const uint32_t MAP_CLK_FREQ_OFFSET = 0x90;
|
||||||
|
|
||||||
static const uint8_t MAX_MAP_ADDR = 63;
|
static const uint8_t MAX_MAP_ADDR = 63;
|
||||||
// Writing this to the map address in the look up table will invalidate a MAP ID.
|
// Writing this to the map address in the look up table will invalidate a MAP ID.
|
||||||
@ -122,11 +128,17 @@ private:
|
|||||||
// Expected value stored in FAR register after reset
|
// Expected value stored in FAR register after reset
|
||||||
static const uint32_t FAR_RESET = 0x7FE0;
|
static const uint32_t FAR_RESET = 0x7FE0;
|
||||||
|
|
||||||
|
static const uint32_t TC_SEGMENT_LEN = 1017;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* TCs with map addresses (also know as Map IDs) assigned to this channel will be stored in
|
* TCs with map addresses (also know as Map IDs) assigned to this channel will be stored in
|
||||||
* the PDEC memory.
|
* the PDEC memory.
|
||||||
*/
|
*/
|
||||||
static const uint32_t PM_BUFFER = 7;
|
static const uint8_t PM_BUFFER = 7;
|
||||||
|
|
||||||
|
// MAP clock frequency. Must be a value between 1 and 13 otherwise the TC segment will be
|
||||||
|
// discarded
|
||||||
|
static const uint8_t MAP_CLK_FREQ = 2;
|
||||||
|
|
||||||
enum class FrameAna_t: uint8_t {
|
enum class FrameAna_t: uint8_t {
|
||||||
ABANDONED_CLTU,
|
ABANDONED_CLTU,
|
||||||
@ -166,7 +178,14 @@ private:
|
|||||||
* @brief Opens UIO device assigned to the base address of the PDEC memory space and maps the
|
* @brief Opens UIO device assigned to the base address of the PDEC memory space and maps the
|
||||||
* physical address into the virtual address space.
|
* physical address into the virtual address space.
|
||||||
*/
|
*/
|
||||||
ReturnValue_t getMemoryBaseAddress();
|
ReturnValue_t getConfigMemoryBaseAddress();
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Opens UIO device assigned to the RAM section of the PDEC IP core memory map.
|
||||||
|
*
|
||||||
|
* @details A received TC segment will be written to this memory area.
|
||||||
|
*/
|
||||||
|
ReturnValue_t getRamBaseAddress();
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This functions writes the configuration parameters to the configuration
|
* @brief This functions writes the configuration parameters to the configuration
|
||||||
@ -225,6 +244,11 @@ private:
|
|||||||
*/
|
*/
|
||||||
ReturnValue_t readTc(uint32_t& tcLength);
|
ReturnValue_t readTc(uint32_t& tcLength);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Prints the tc segment data
|
||||||
|
*/
|
||||||
|
void printTC(uint32_t tcLength);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function calculates the entry for the configuration of the MAP ID routing.
|
* @brief This function calculates the entry for the configuration of the MAP ID routing.
|
||||||
*
|
*
|
||||||
@ -259,8 +283,11 @@ private:
|
|||||||
*/
|
*/
|
||||||
gpioId_t pdecReset = gpio::NO_GPIO;
|
gpioId_t pdecReset = gpio::NO_GPIO;
|
||||||
|
|
||||||
// UIO device file giving access to the PDEC memory space
|
// UIO device file giving access to the PDEC configuration memory section
|
||||||
std::string uioMemory;
|
std::string uioConfigMemory;
|
||||||
|
|
||||||
|
// UIO device file giving access to the PDEC RAM section
|
||||||
|
std::string uioRamMemory;
|
||||||
|
|
||||||
// UIO device file giving access to the PDEC register space
|
// UIO device file giving access to the PDEC register space
|
||||||
std::string uioRegisters;
|
std::string uioRegisters;
|
||||||
@ -276,12 +303,14 @@ private:
|
|||||||
*/
|
*/
|
||||||
uint32_t* memoryBaseAddress = nullptr;
|
uint32_t* memoryBaseAddress = nullptr;
|
||||||
|
|
||||||
|
uint32_t* ramBaseAddress = nullptr;
|
||||||
|
|
||||||
// Pointer pointing to base address of register space
|
// Pointer pointing to base address of register space
|
||||||
uint32_t* registerBaseAddress = nullptr;
|
uint32_t* registerBaseAddress = nullptr;
|
||||||
|
|
||||||
uint32_t pdecFar = 0;
|
uint32_t pdecFar = 0;
|
||||||
|
|
||||||
uint8_t tcSegment[1017];
|
uint8_t tcSegment[TC_SEGMENT_LEN];
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif /* LINUX_OBC_PDECHANDLER_H_ */
|
#endif /* LINUX_OBC_PDECHANDLER_H_ */
|
||||||
|
Loading…
Reference in New Issue
Block a user