Change PDEC addresses #813
@ -115,6 +115,9 @@ static constexpr float SCHED_BLOCK_10_PERIOD =
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} // namespace spiSched
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} // namespace spiSched
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namespace pdec {
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static constexpr uint32_t PDEC_CONFIG_BASE_ADDR_LEGACY = 0x24000000;
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}
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} // namespace config
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} // namespace config
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#endif /* COMMON_CONFIG_DEFINITIONS_H_ */
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#endif /* COMMON_CONFIG_DEFINITIONS_H_ */
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@ -31,6 +31,8 @@ PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId,
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gpioComIF(gpioComIF),
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gpioComIF(gpioComIF),
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pdecReset(pdecReset),
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pdecReset(pdecReset),
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actionHelper(this, nullptr),
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actionHelper(this, nullptr),
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cfgMemBaseAddr(cfgMemPhyAddr),
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pdecRamBaseAddr(pdecRamPhyAddr),
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uioNames(names),
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uioNames(names),
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paramHelper(this) {
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paramHelper(this) {
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auto mqArgs = MqArgs(objectId, static_cast<void*>(this));
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auto mqArgs = MqArgs(objectId, static_cast<void*>(this));
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@ -68,7 +70,7 @@ ReturnValue_t PdecHandler::initialize() {
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};
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};
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memoryBaseAddress = static_cast<uint32_t*>(
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memoryBaseAddress = static_cast<uint32_t*>(
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mmap(0, PDEC_CFG_MEM_SIZE, static_cast<int>(UioMapper::Permissions::READ_WRITE), MAP_SHARED,
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mmap(0, PDEC_CFG_MEM_SIZE, static_cast<int>(UioMapper::Permissions::READ_WRITE), MAP_SHARED,
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fd, PDEC_CFG_MEM_PHY_ADDR));
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fd, cfgMemBaseAddr));
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if (memoryBaseAddress == nullptr) {
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if (memoryBaseAddress == nullptr) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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@ -76,7 +78,7 @@ ReturnValue_t PdecHandler::initialize() {
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ramBaseAddress = static_cast<uint32_t*>(mmap(0, PDEC_RAM_SIZE,
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ramBaseAddress = static_cast<uint32_t*>(mmap(0, PDEC_RAM_SIZE,
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static_cast<int>(UioMapper::Permissions::READ_WRITE),
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static_cast<int>(UioMapper::Permissions::READ_WRITE),
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MAP_SHARED, fd, PDEC_RAM_PHY_ADDR));
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MAP_SHARED, fd, pdecRamBaseAddr));
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if (ramBaseAddress == nullptr) {
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if (ramBaseAddress == nullptr) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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@ -646,7 +648,7 @@ void PdecHandler::handleNewTc() {
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}
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}
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ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
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ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
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uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - PHYSICAL_RAM_BASE_ADDRESS) / 4;
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uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - pdecRamBaseAddr) / 4;
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#if OBSW_DEBUG_PDEC_HANDLER == 1
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#if OBSW_DEBUG_PDEC_HANDLER == 1
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sif::debug << "PdecHandler::readTc: TC offset: 0x" << std::hex << tcOffset << std::endl;
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sif::debug << "PdecHandler::readTc: TC offset: 0x" << std::hex << tcOffset << std::endl;
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@ -52,9 +52,9 @@ class PdecHandler : public SystemObject,
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public:
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public:
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static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500;
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static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500;
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static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000;
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static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000;
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static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000;
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//static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000;
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static constexpr uint32_t PDEC_RAM_SIZE = 0x10000;
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static constexpr uint32_t PDEC_RAM_SIZE = 0x10000;
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static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000;
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//static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000;
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enum class Modes { POLLED, IRQ };
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enum class Modes { POLLED, IRQ };
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@ -146,8 +146,6 @@ class PdecHandler : public SystemObject,
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LinuxLibgpioIF* gpioComIF = nullptr;
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LinuxLibgpioIF* gpioComIF = nullptr;
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uint32_t cfgMemBaseAddr = 0x0;
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uint32_t pdecRamBaseAddr = 0x0;
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uint32_t interruptCounter = 0;
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uint32_t interruptCounter = 0;
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Countdown interruptWindowCd = Countdown(1000);
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Countdown interruptWindowCd = Countdown(1000);
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@ -191,6 +189,9 @@ class PdecHandler : public SystemObject,
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MessageQueueId_t commandedBy = MessageQueueIF::NO_QUEUE;
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MessageQueueId_t commandedBy = MessageQueueIF::NO_QUEUE;
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bool ptmeResetWithReinitializationPending = false;
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bool ptmeResetWithReinitializationPending = false;
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uint32_t cfgMemBaseAddr;
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uint32_t pdecRamBaseAddr;
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UioNames uioNames;
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UioNames uioNames;
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ParameterHelper paramHelper;
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ParameterHelper paramHelper;
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