Change PDEC addresses #813
@ -16,6 +16,12 @@ will consitute of a breaking change warranting a new major release:
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# [unreleased]
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# [unreleased]
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## Changed
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- Changed PDEC addresses depending on which firmware version is used. It is suspected that
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the previous addresses were invalid and not properly covered by the Linux memory protection.
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The OBSW will use the old addresses for older FW versions.
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# [v7.2.0] 2023-10-27
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# [v7.2.0] 2023-10-27
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- `eive-tmtc` v5.10.1
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- `eive-tmtc` v5.10.1
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@ -18,7 +18,8 @@ static constexpr char I2C_Q7_EIVE[] = "/dev/i2c_q7";
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static constexpr char UART_GNSS_DEV[] = "/dev/gps0";
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static constexpr char UART_GNSS_DEV[] = "/dev/gps0";
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static constexpr char UART_PLOC_MPSOC_DEV[] = "/dev/ul_plmpsoc";
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static constexpr char UART_PLOC_MPSOC_DEV[] = "/dev/ul_plmpsoc";
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static constexpr char UART_PLOC_SUPERVSIOR_DEV[] = "/dev/ploc_supv";
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static constexpr char UART_PLOC_SUPERVISOR_DEV_FALLBACK[] = "/dev/ttyUL4";
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static constexpr char UART_PLOC_SUPERVISOR_DEV[] = "/dev/ploc_supv";
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static constexpr char UART_SYRLINKS_DEV[] = "/dev/ul_syrlinks";
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static constexpr char UART_SYRLINKS_DEV[] = "/dev/ul_syrlinks";
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static constexpr char UART_STAR_TRACKER_DEV[] = "/dev/ul_str";
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static constexpr char UART_STAR_TRACKER_DEV[] = "/dev/ul_str";
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static constexpr char UART_SCEX_DEV[] = "/dev/scex";
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static constexpr char UART_SCEX_DEV[] = "/dev/scex";
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@ -163,8 +163,8 @@ void ObjectFactory::produce(void* args) {
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#if OBSW_ADD_CCSDS_IP_CORES == 1
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#if OBSW_ADD_CCSDS_IP_CORES == 1
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CcsdsIpCoreHandler* ipCoreHandler = nullptr;
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CcsdsIpCoreHandler* ipCoreHandler = nullptr;
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CcsdsComponentArgs ccsdsArgs(*gpioComIF, *ipcStore, *tmStore, stores, *pusFunnel, *cfdpFunnel,
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CcsdsComponentArgs ccsdsArgs(*gpioComIF, *ipcStore, *tmStore, stores, *pusFunnel, *cfdpFunnel,
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&ipCoreHandler);
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&ipCoreHandler, 0, 0);
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createCcsdsIpComponentsAddTmRouting(ccsdsArgs);
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createCcsdsIpComponentsWrapper(ccsdsArgs);
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#endif /* OBSW_ADD_CCSDS_IP_CORES == 1 */
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#endif /* OBSW_ADD_CCSDS_IP_CORES == 1 */
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/* Test Task */
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/* Test Task */
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@ -115,8 +115,8 @@ void ObjectFactory::produce(void* args) {
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#if OBSW_ADD_CCSDS_IP_CORES == 1
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#if OBSW_ADD_CCSDS_IP_CORES == 1
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CcsdsIpCoreHandler* ipCoreHandler = nullptr;
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CcsdsIpCoreHandler* ipCoreHandler = nullptr;
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CcsdsComponentArgs ccsdsArgs(*gpioComIF, *ipcStore, *tmStore, stores, *pusFunnel, *cfdpFunnel,
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CcsdsComponentArgs ccsdsArgs(*gpioComIF, *ipcStore, *tmStore, stores, *pusFunnel, *cfdpFunnel,
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&ipCoreHandler);
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&ipCoreHandler, 0, 0);
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createCcsdsIpComponentsAddTmRouting(ccsdsArgs);
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createCcsdsIpComponentsWrapper(ccsdsArgs);
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#endif /* OBSW_ADD_CCSDS_IP_CORES == 1 */
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#endif /* OBSW_ADD_CCSDS_IP_CORES == 1 */
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#if OBSW_ADD_SCEX_DEVICE == 1
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#if OBSW_ADD_SCEX_DEVICE == 1
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@ -642,8 +642,12 @@ void ObjectFactory::createPayloadComponents(LinuxLibgpioIF* gpioComIF, PowerSwit
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auto supvGpioCookie = new GpioCookie;
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auto supvGpioCookie = new GpioCookie;
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supvGpioCookie->addGpio(gpioIds::ENABLE_SUPV_UART, gpioConfigSupv);
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supvGpioCookie->addGpio(gpioIds::ENABLE_SUPV_UART, gpioConfigSupv);
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gpioComIF->addGpios(supvGpioCookie);
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gpioComIF->addGpios(supvGpioCookie);
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const char* plocSupvDev = q7s::UART_PLOC_SUPERVISOR_DEV;
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if(not std::filesystem::exists(plocSupvDev)) {
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plocSupvDev = q7s::UART_PLOC_SUPERVISOR_DEV_FALLBACK;
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}
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auto supervisorCookie = new SerialCookie(objects::PLOC_SUPERVISOR_HANDLER,
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auto supervisorCookie = new SerialCookie(objects::PLOC_SUPERVISOR_HANDLER,
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q7s::UART_PLOC_SUPERVSIOR_DEV, serial::PLOC_SUPV_BAUD,
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plocSupvDev, serial::PLOC_SUPV_BAUD,
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supv::MAX_PACKET_SIZE * 20, UartModes::NON_CANONICAL);
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supv::MAX_PACKET_SIZE * 20, UartModes::NON_CANONICAL);
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supervisorCookie->setNoFixedSizeReply();
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supervisorCookie->setNoFixedSizeReply();
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auto supvHelper = new PlocSupvUartManager(objects::PLOC_SUPERVISOR_HELPER);
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auto supvHelper = new PlocSupvUartManager(objects::PLOC_SUPERVISOR_HELPER);
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@ -836,7 +840,7 @@ ReturnValue_t ObjectFactory::createCcsdsComponents(CcsdsComponentArgs& args) {
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uioNames.registers = q7s::UIO_PDEC_REGISTERS;
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uioNames.registers = q7s::UIO_PDEC_REGISTERS;
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uioNames.irq = q7s::UIO_PDEC_IRQ;
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uioNames.irq = q7s::UIO_PDEC_IRQ;
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new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, &args.gpioComIF,
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new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, &args.gpioComIF,
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gpioIds::PDEC_RESET, uioNames);
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gpioIds::PDEC_RESET, uioNames, args.pdecCfgMemBaseAddr, args.pdecRamBaseAddr);
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GpioCookie* gpioRS485Chip = new GpioCookie;
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GpioCookie* gpioRS485Chip = new GpioCookie;
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gpio = new GpiodRegularByLineName(q7s::gpioNames::RS485_EN_TX_CLOCK, "RS485 Transceiver",
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gpio = new GpiodRegularByLineName(q7s::gpioNames::RS485_EN_TX_CLOCK, "RS485 Transceiver",
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Direction::OUT, Levels::LOW);
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Direction::OUT, Levels::LOW);
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@ -1062,7 +1066,13 @@ ReturnValue_t ObjectFactory::readFirmwareVersion() {
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return returnvalue::OK;
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return returnvalue::OK;
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}
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}
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ReturnValue_t ObjectFactory::createCcsdsIpComponentsAddTmRouting(CcsdsComponentArgs& ccsdsArgs) {
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ReturnValue_t ObjectFactory::createCcsdsIpComponentsWrapper(CcsdsComponentArgs& ccsdsArgs) {
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ccsdsArgs.pdecCfgMemBaseAddr = config::pdec::PDEC_CONFIG_BASE_ADDR;
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ccsdsArgs.pdecRamBaseAddr = config::pdec::PDEC_RAM_ADDR;
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if (core::FW_VERSION_MAJOR < 6) {
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ccsdsArgs.pdecCfgMemBaseAddr = config::pdec::PDEC_CONFIG_BASE_ADDR_LEGACY;
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ccsdsArgs.pdecRamBaseAddr = config::pdec::PDEC_RAM_ADDR_LEGACY;
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}
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ReturnValue_t result = createCcsdsComponents(ccsdsArgs);
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ReturnValue_t result = createCcsdsComponents(ccsdsArgs);
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#if OBSW_TM_TO_PTME == 1
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#if OBSW_TM_TO_PTME == 1
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if (ccsdsArgs.normalLiveTmDest != MessageQueueIF::NO_QUEUE) {
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if (ccsdsArgs.normalLiveTmDest != MessageQueueIF::NO_QUEUE) {
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@ -31,14 +31,17 @@ namespace ObjectFactory {
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struct CcsdsComponentArgs {
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struct CcsdsComponentArgs {
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CcsdsComponentArgs(LinuxLibgpioIF& gpioIF, StorageManagerIF& ipcStore, StorageManagerIF& tmStore,
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CcsdsComponentArgs(LinuxLibgpioIF& gpioIF, StorageManagerIF& ipcStore, StorageManagerIF& tmStore,
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PersistentTmStores& stores, PusTmFunnel& pusFunnel, CfdpTmFunnel& cfdpFunnel,
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PersistentTmStores& stores, PusTmFunnel& pusFunnel, CfdpTmFunnel& cfdpFunnel,
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CcsdsIpCoreHandler** ipCoreHandler)
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CcsdsIpCoreHandler** ipCoreHandler, uint32_t pdecCfgMemBaseAddr,
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uint32_t pdecRamBaseAddr)
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: gpioComIF(gpioIF),
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: gpioComIF(gpioIF),
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ipcStore(ipcStore),
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ipcStore(ipcStore),
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tmStore(tmStore),
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tmStore(tmStore),
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stores(stores),
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stores(stores),
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pusFunnel(pusFunnel),
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pusFunnel(pusFunnel),
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cfdpFunnel(cfdpFunnel),
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cfdpFunnel(cfdpFunnel),
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ipCoreHandler(ipCoreHandler) {}
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ipCoreHandler(ipCoreHandler),
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pdecCfgMemBaseAddr(pdecCfgMemBaseAddr),
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pdecRamBaseAddr(pdecRamBaseAddr) {}
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LinuxLibgpioIF& gpioComIF;
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LinuxLibgpioIF& gpioComIF;
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StorageManagerIF& ipcStore;
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StorageManagerIF& ipcStore;
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StorageManagerIF& tmStore;
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StorageManagerIF& tmStore;
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@ -46,6 +49,8 @@ struct CcsdsComponentArgs {
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PusTmFunnel& pusFunnel;
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PusTmFunnel& pusFunnel;
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CfdpTmFunnel& cfdpFunnel;
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CfdpTmFunnel& cfdpFunnel;
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CcsdsIpCoreHandler** ipCoreHandler;
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CcsdsIpCoreHandler** ipCoreHandler;
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uint32_t pdecCfgMemBaseAddr;
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uint32_t pdecRamBaseAddr;
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MessageQueueId_t normalLiveTmDest = MessageQueueIF::NO_QUEUE;
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MessageQueueId_t normalLiveTmDest = MessageQueueIF::NO_QUEUE;
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MessageQueueId_t cfdpLiveTmDest = MessageQueueIF::NO_QUEUE;
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MessageQueueId_t cfdpLiveTmDest = MessageQueueIF::NO_QUEUE;
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};
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};
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@ -75,7 +80,7 @@ void createSolarArrayDeploymentComponents(PowerSwitchIF& pwrSwitcher, GpioIF& gp
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void createSyrlinksComponents(PowerSwitchIF* pwrSwitcher);
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void createSyrlinksComponents(PowerSwitchIF* pwrSwitcher);
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void createPayloadComponents(LinuxLibgpioIF* gpioComIF, PowerSwitchIF& pwrSwitcher);
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void createPayloadComponents(LinuxLibgpioIF* gpioComIF, PowerSwitchIF& pwrSwitcher);
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void createReactionWheelComponents(LinuxLibgpioIF* gpioComIF, PowerSwitchIF* pwrSwitcher);
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void createReactionWheelComponents(LinuxLibgpioIF* gpioComIF, PowerSwitchIF* pwrSwitcher);
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ReturnValue_t createCcsdsIpComponentsAddTmRouting(CcsdsComponentArgs& args);
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ReturnValue_t createCcsdsIpComponentsWrapper(CcsdsComponentArgs& args);
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ReturnValue_t createCcsdsComponents(CcsdsComponentArgs& args);
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ReturnValue_t createCcsdsComponents(CcsdsComponentArgs& args);
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ReturnValue_t readFirmwareVersion();
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ReturnValue_t readFirmwareVersion();
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void createMiscComponents();
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void createMiscComponents();
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@ -115,6 +115,18 @@ static constexpr float SCHED_BLOCK_10_PERIOD =
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} // namespace spiSched
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} // namespace spiSched
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namespace pdec {
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// Pre FW v6.0.0
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static constexpr uint32_t PDEC_CONFIG_BASE_ADDR_LEGACY = 0x24000000;
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static constexpr uint32_t PDEC_RAM_ADDR_LEGACY = 0x26000000;
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// Post FW v6.0.0
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static constexpr uint32_t PDEC_CONFIG_BASE_ADDR = 0x4000000;
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static constexpr uint32_t PDEC_RAM_ADDR = 0x7000000;
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} // namespace pdec
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} // namespace config
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} // namespace config
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#endif /* COMMON_CONFIG_DEFINITIONS_H_ */
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#endif /* COMMON_CONFIG_DEFINITIONS_H_ */
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@ -24,12 +24,15 @@ using namespace pdec;
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uint32_t PdecHandler::CURRENT_FAR = 0;
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uint32_t PdecHandler::CURRENT_FAR = 0;
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PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId,
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PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId,
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LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, UioNames names)
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LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, UioNames names,
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uint32_t cfgMemPhyAddr, uint32_t pdecRamPhyAddr)
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: SystemObject(objectId),
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: SystemObject(objectId),
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tcDestinationId(tcDestinationId),
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tcDestinationId(tcDestinationId),
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gpioComIF(gpioComIF),
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gpioComIF(gpioComIF),
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pdecReset(pdecReset),
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pdecReset(pdecReset),
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actionHelper(this, nullptr),
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actionHelper(this, nullptr),
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cfgMemBaseAddr(cfgMemPhyAddr),
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pdecRamBaseAddr(pdecRamPhyAddr),
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uioNames(names),
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uioNames(names),
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paramHelper(this) {
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paramHelper(this) {
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auto mqArgs = MqArgs(objectId, static_cast<void*>(this));
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auto mqArgs = MqArgs(objectId, static_cast<void*>(this));
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@ -67,7 +70,7 @@ ReturnValue_t PdecHandler::initialize() {
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};
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};
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memoryBaseAddress = static_cast<uint32_t*>(
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memoryBaseAddress = static_cast<uint32_t*>(
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mmap(0, PDEC_CFG_MEM_SIZE, static_cast<int>(UioMapper::Permissions::READ_WRITE), MAP_SHARED,
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mmap(0, PDEC_CFG_MEM_SIZE, static_cast<int>(UioMapper::Permissions::READ_WRITE), MAP_SHARED,
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fd, PDEC_CFG_MEM_PHY_ADDR));
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fd, cfgMemBaseAddr));
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if (memoryBaseAddress == nullptr) {
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if (memoryBaseAddress == nullptr) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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@ -75,7 +78,7 @@ ReturnValue_t PdecHandler::initialize() {
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ramBaseAddress = static_cast<uint32_t*>(mmap(0, PDEC_RAM_SIZE,
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ramBaseAddress = static_cast<uint32_t*>(mmap(0, PDEC_RAM_SIZE,
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static_cast<int>(UioMapper::Permissions::READ_WRITE),
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static_cast<int>(UioMapper::Permissions::READ_WRITE),
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MAP_SHARED, fd, PDEC_RAM_PHY_ADDR));
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MAP_SHARED, fd, pdecRamBaseAddr));
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if (ramBaseAddress == nullptr) {
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if (ramBaseAddress == nullptr) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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@ -466,11 +469,6 @@ bool PdecHandler::newTcReceived() {
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}
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}
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void PdecHandler::doPeriodicWork() {
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void PdecHandler::doPeriodicWork() {
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// scuffed test code
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// if(testCntr < 30) {
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// triggerEvent(pdec::INVALID_TC_FRAME, FRAME_DIRTY_RETVAL);
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// testCntr++;
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// }
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checkLocks();
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checkLocks();
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}
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}
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@ -645,7 +643,7 @@ void PdecHandler::handleNewTc() {
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}
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}
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ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
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ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
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uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - PHYSICAL_RAM_BASE_ADDRESS) / 4;
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uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - pdecRamBaseAddr) / 4;
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||||||
#if OBSW_DEBUG_PDEC_HANDLER == 1
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#if OBSW_DEBUG_PDEC_HANDLER == 1
|
||||||
sif::debug << "PdecHandler::readTc: TC offset: 0x" << std::hex << tcOffset << std::endl;
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sif::debug << "PdecHandler::readTc: TC offset: 0x" << std::hex << tcOffset << std::endl;
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||||||
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@ -52,9 +52,7 @@ class PdecHandler : public SystemObject,
|
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public:
|
public:
|
||||||
static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500;
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static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500;
|
||||||
static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000;
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static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000;
|
||||||
static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000;
|
|
||||||
static constexpr uint32_t PDEC_RAM_SIZE = 0x10000;
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static constexpr uint32_t PDEC_RAM_SIZE = 0x10000;
|
||||||
static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000;
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|
||||||
|
|
||||||
enum class Modes { POLLED, IRQ };
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enum class Modes { POLLED, IRQ };
|
||||||
|
|
||||||
@ -68,7 +66,7 @@ class PdecHandler : public SystemObject,
|
|||||||
* @param uioregsiters String of uio device file same mapped to the PDEC register space
|
* @param uioregsiters String of uio device file same mapped to the PDEC register space
|
||||||
*/
|
*/
|
||||||
PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF,
|
PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF,
|
||||||
gpioId_t pdecReset, UioNames names);
|
gpioId_t pdecReset, UioNames names, uint32_t cfgMemPhyAddr, uint32_t pdecRamPhyAddr);
|
||||||
|
|
||||||
virtual ~PdecHandler();
|
virtual ~PdecHandler();
|
||||||
|
|
||||||
@ -103,12 +101,6 @@ class PdecHandler : public SystemObject,
|
|||||||
static const size_t MAX_TC_SEGMENT_SIZE = 1017;
|
static const size_t MAX_TC_SEGMENT_SIZE = 1017;
|
||||||
static const uint8_t MAP_ID_MASK = 0x3F;
|
static const uint8_t MAP_ID_MASK = 0x3F;
|
||||||
|
|
||||||
#ifdef TE0720_1CFA
|
|
||||||
static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x32000000;
|
|
||||||
#else
|
|
||||||
static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x26000000;
|
|
||||||
#endif
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|
||||||
|
|
||||||
// Expected value stored in FAR register after reset
|
// Expected value stored in FAR register after reset
|
||||||
static const uint32_t FAR_RESET = 0x7FE0;
|
static const uint32_t FAR_RESET = 0x7FE0;
|
||||||
|
|
||||||
@ -195,6 +187,9 @@ class PdecHandler : public SystemObject,
|
|||||||
MessageQueueId_t commandedBy = MessageQueueIF::NO_QUEUE;
|
MessageQueueId_t commandedBy = MessageQueueIF::NO_QUEUE;
|
||||||
bool ptmeResetWithReinitializationPending = false;
|
bool ptmeResetWithReinitializationPending = false;
|
||||||
|
|
||||||
|
uint32_t cfgMemBaseAddr;
|
||||||
|
uint32_t pdecRamBaseAddr;
|
||||||
|
|
||||||
UioNames uioNames;
|
UioNames uioNames;
|
||||||
|
|
||||||
ParameterHelper paramHelper;
|
ParameterHelper paramHelper;
|
||||||
|
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Reference in New Issue
Block a user