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c32c018025
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v1
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2024-12-18 14:44:11 +01:00 |
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f904f40f92
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v1
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2024-12-18 14:41:58 +01:00 |
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22d2e932a1
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v1
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2024-12-18 14:40:45 +01:00 |
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1b81639b27
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v1
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2024-12-18 14:39:06 +01:00 |
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99db0b1420
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v1
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2024-12-18 14:36:03 +01:00 |
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a9ff327036
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ci
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2024-12-18 14:32:18 +01:00 |
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c195ea451f
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CI
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2024-12-17 15:13:22 +01:00 |
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8cd505dba0
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CI
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2024-12-17 15:12:32 +01:00 |
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753beba2f4
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CI
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2024-12-17 15:09:41 +01:00 |
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e0242e515d
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ci workflow and docker files
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2024-10-30 22:32:44 +01:00 |
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164b8ed6c2
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relative path for lwip submodule
mohr_ci
v1.2.3
v1.2.4
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2024-10-17 15:36:07 +02:00 |
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7e0d346962
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documentation
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2024-10-17 14:56:32 +02:00 |
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35b951597a
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corrected commit in lwip submodule
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2024-10-17 14:34:08 +02:00 |
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b341a0f7bf
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using our fork of lwip
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2024-10-17 14:20:30 +02:00 |
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d3af5e1519
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additional adjustment to xil_eth
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2024-10-17 14:00:32 +02:00 |
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242b8e4958
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moving FreeRTOS into contrib
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2024-10-17 14:00:05 +02:00 |
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6ff33beecc
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adjusting xil eth to work for us
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2024-10-14 14:15:07 +02:00 |
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fd2c5a544f
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xilinx eth lwip version xilinx_v2024.1
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2024-10-14 14:06:49 +02:00 |
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65299e46c4
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documentation
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2024-10-14 13:36:46 +02:00 |
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fb4b12c8f9
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xilinx ps7_cortexa9 code Version xilinx_v2024.1
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2024-10-14 13:36:25 +02:00 |
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dd9c39af30
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further cleanup
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2024-10-10 16:04:18 +02:00 |
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791428e6c0
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making the linker happy
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2024-10-07 16:55:20 +02:00 |
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944e45cad2
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refactoring, added second binary for sim interface, added second lwip implementation for sim interface
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2024-09-30 17:38:37 +02:00 |
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8fa5cddc23
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cleanup
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2024-09-09 17:37:41 +02:00 |
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44ffb09ee9
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ps7_init for zedboard
uart0 is 1000000 baud
uart1 is 230400 baud
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2024-09-09 16:28:27 +02:00 |
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5ad8853fef
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uart1 IO
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2024-08-29 14:48:16 +02:00 |
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8e7424bb2f
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io interface; relying on patched lwip
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2024-08-26 23:03:38 +02:00 |
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ee06c79bf4
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xilinx eth in own folder. found another bug/challenge with dma
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2024-08-26 12:03:31 +02:00 |
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8497fe754c
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cleanup
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2024-08-23 12:06:35 +02:00 |
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ae47ca8291
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found it. DMA can obviously not handle fragmented pbufs to receive packets. -> debug cleanup needed
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2024-08-22 18:14:51 +02:00 |
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497e380860
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RX working, still a bit messy
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2024-08-20 22:38:02 +02:00 |
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6c556b8fbf
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better, not done
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2024-08-20 15:13:03 +02:00 |
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2d8d8aeb0a
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working on RX, broke FreeRTOS
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2024-08-20 11:26:27 +02:00 |
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910553df45
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added xilinx lwip drivers, outgoing is working incoming TODO
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2024-08-19 16:52:10 +02:00 |
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fe5629fa85
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switched to UDP from UNIX Socket
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2024-08-02 01:05:11 +02:00 |
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926ef26000
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z7 uart0 buffered read
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2024-07-23 17:08:11 +02:00 |
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cbe8184fab
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portable device access api based on unix file descriptors
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2024-07-20 00:27:24 +02:00 |
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49c19ba675
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procmac to not forget writing open calls
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2024-07-16 23:11:38 +02:00 |
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02a7d525be
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Using write() for output for better portability
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2024-07-16 14:12:15 +02:00 |
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716fdd7fa0
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Merge branch 'mohr/rust'
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2024-07-12 16:57:48 +02:00 |
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976e079d02
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added freeRTOS on linux build
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2024-07-12 16:56:31 +02:00 |
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paul nehlich
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c3ae428da7
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Readme minor update
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2024-07-11 14:06:05 +02:00 |
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paul nehlich
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f2b3319973
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Tutorial minor change
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2024-07-11 13:53:54 +02:00 |
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paul nehlich
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5707c9f8ae
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Docker Tutorial updated (by Andy, just pasting it here)
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2024-06-26 16:23:02 +02:00 |
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a7336c7f75
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handling failed freeRTOS assertion as panic
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2024-06-25 13:19:31 +02:00 |
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c9a81c025f
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removed unused fsfw submodule file
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2024-06-25 13:19:19 +02:00 |
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paul nehlich
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5c9df20ed1
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Should build now, sorry
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2024-06-25 12:12:09 +02:00 |
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paul nehlich
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af95ae60b1
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Merge branch 'main' of egit.irs.uni-stuttgart.de:romeo/obsw
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2024-06-17 12:39:26 +02:00 |
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paul nehlich
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6eec534116
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Added submodule to provide zedboard fsbl
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2024-06-17 12:39:12 +02:00 |
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2aec6c3931
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BUILD_WITH_CMAKE.md aktualisiert
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2024-06-17 12:30:38 +02:00 |
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