2023-01-26 17:18:05 +01:00
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#include "comModeTree.h"
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#include <fsfw/modes/HasModesIF.h>
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2023-01-27 11:29:13 +01:00
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#include <fsfw/returnvalues/returnvalue.h>
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2023-01-26 17:18:05 +01:00
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#include <fsfw/subsystem/Subsystem.h>
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2023-01-27 14:44:40 +01:00
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#include "eive/objects.h"
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#include "mission/comDefs.h"
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2023-01-26 17:18:05 +01:00
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#include "util.h"
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const auto check = subsystem::checkInsert;
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2023-02-02 15:33:04 +01:00
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ComSubsystem satsystem::com::SUBSYSTEM = ComSubsystem(objects::COM_SUBSYSTEM, 12, 24, TRANSMITTER_TIMEOUT);
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2023-01-27 11:29:13 +01:00
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2023-01-26 17:18:05 +01:00
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static const auto OFF = HasModesIF::MODE_OFF;
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static const auto ON = HasModesIF::MODE_ON;
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static const auto NML = DeviceHandlerIF::MODE_NORMAL;
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2023-01-27 15:42:49 +01:00
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auto COM_SEQUENCE_RX_ONLY =
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2023-01-27 15:57:18 +01:00
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std::make_pair(::com::Submode::RX_ONLY, FixedArrayList<ModeListEntry, 3>());
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2023-01-27 18:38:36 +01:00
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auto COM_TABLE_RX_ONLY_TGT =
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std::make_pair((::com::Submode::RX_ONLY << 24) | 1, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_ONLY_TRANS_0 =
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2023-01-27 15:57:18 +01:00
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std::make_pair((::com::Submode::RX_ONLY << 24) | 2, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_ONLY_TRANS_1 =
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2023-01-27 15:57:18 +01:00
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std::make_pair((::com::Submode::RX_ONLY << 24) | 3, FixedArrayList<ModeListEntry, 3>());
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2023-01-27 14:44:40 +01:00
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2023-01-27 15:42:49 +01:00
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auto COM_SEQUENCE_RX_AND_TX_LOW_RATE =
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2023-01-27 15:57:18 +01:00
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std::make_pair(::com::Submode::RX_AND_TX_LOW_DATARATE, FixedArrayList<ModeListEntry, 3>());
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2023-01-27 18:38:36 +01:00
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auto COM_TABLE_RX_AND_TX_LOW_RATE_TGT = std::make_pair(
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(::com::Submode::RX_AND_TX_LOW_DATARATE << 24) | 1, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_0 = std::make_pair(
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(::com::Submode::RX_AND_TX_LOW_DATARATE << 24) | 2, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_1 = std::make_pair(
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(::com::Submode::RX_AND_TX_LOW_DATARATE << 24) | 3, FixedArrayList<ModeListEntry, 3>());
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2023-01-27 14:44:40 +01:00
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2023-01-27 15:42:49 +01:00
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auto COM_SEQUENCE_RX_AND_TX_HIGH_RATE =
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2023-01-27 15:57:18 +01:00
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std::make_pair(::com::Submode::RX_AND_TX_HIGH_DATARATE, FixedArrayList<ModeListEntry, 3>());
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2023-01-27 18:38:36 +01:00
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auto COM_TABLE_RX_AND_TX_HIGH_RATE_TGT = std::make_pair(
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(::com::Submode::RX_AND_TX_HIGH_DATARATE << 24) | 1, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_0 = std::make_pair(
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(::com::Submode::RX_AND_TX_HIGH_DATARATE << 24) | 2, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_1 = std::make_pair(
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(::com::Submode::RX_AND_TX_HIGH_DATARATE << 24) | 3, FixedArrayList<ModeListEntry, 3>());
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2023-01-26 17:18:05 +01:00
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2023-01-27 20:23:55 +01:00
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auto COM_SEQUENCE_RX_AND_TX_DEFAULT_RATE =
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std::make_pair(::com::Submode::RX_AND_TX_DEFAULT_DATARATE, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_AND_TX_DEFAULT_RATE_TGT = std::make_pair(
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(::com::Submode::RX_AND_TX_DEFAULT_DATARATE << 24) | 1, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_0 = std::make_pair(
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(::com::Submode::RX_AND_TX_DEFAULT_DATARATE << 24) | 2, FixedArrayList<ModeListEntry, 3>());
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auto COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_1 = std::make_pair(
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(::com::Submode::RX_AND_TX_DEFAULT_DATARATE << 24) | 3, FixedArrayList<ModeListEntry, 3>());
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2023-01-26 17:18:05 +01:00
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namespace {
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void buildRxOnlySequence(Subsystem& ss, ModeListEntry& eh);
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void buildTxAndRxLowRateSequence(Subsystem& ss, ModeListEntry& eh);
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void buildTxAndRxHighRateSequence(Subsystem& ss, ModeListEntry& eh);
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2023-01-27 20:23:55 +01:00
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void buildTxAndRxDefaultRateSequence(Subsystem& ss, ModeListEntry& eh);
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2023-01-27 18:38:36 +01:00
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2023-01-26 17:18:05 +01:00
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} // namespace
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void satsystem::com::init() {
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ModeListEntry entry;
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2023-01-27 14:44:40 +01:00
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buildRxOnlySequence(SUBSYSTEM, entry);
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buildTxAndRxLowRateSequence(SUBSYSTEM, entry);
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buildTxAndRxHighRateSequence(SUBSYSTEM, entry);
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2023-01-27 20:23:55 +01:00
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buildTxAndRxDefaultRateSequence(SUBSYSTEM, entry);
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SUBSYSTEM.setInitialMode(NML, ::com::Submode::RX_ONLY);
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2023-01-26 17:18:05 +01:00
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}
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namespace {
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2023-01-27 14:44:40 +01:00
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void buildRxOnlySequence(Subsystem& ss, ModeListEntry& eh) {
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std::string context = "satsystem::com::buildRxOnlySequence";
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2023-01-26 17:18:05 +01:00
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auto ctxc = context.c_str();
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// Insert Helper Table
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auto iht = [&](object_id_t obj, Mode_t mode, Submode_t submode, ArrayList<ModeListEntry>& table) {
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eh.setObject(obj);
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eh.setMode(mode);
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eh.setSubmode(submode);
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check(table.insert(eh), ctxc);
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};
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// Insert Helper Sequence
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auto ihs = [&](ArrayList<ModeListEntry>& sequence, Mode_t tableId, uint32_t waitSeconds,
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bool checkSuccess) {
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eh.setTableId(tableId);
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eh.setWaitSeconds(waitSeconds);
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eh.setCheckSuccess(checkSuccess);
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check(sequence.insert(eh), ctxc);
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};
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2023-01-27 14:44:40 +01:00
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// Build RX Only table. We could track the state of the CCSDS IP core handler
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// as well but I do not think this is necessary because enabling that should
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2023-02-02 15:33:04 +01:00
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// not interfere with the Syrlinks Handler.
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2023-01-27 14:44:40 +01:00
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iht(objects::SYRLINKS_HANDLER, NML, ::com::Submode::RX_ONLY, COM_TABLE_RX_ONLY_TGT.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_ONLY_TGT.first, &COM_TABLE_RX_ONLY_TGT.second)), ctxc);
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2023-01-26 17:18:05 +01:00
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2023-01-27 14:44:40 +01:00
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// Build RX Only transition 0
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iht(objects::SYRLINKS_HANDLER, NML, ::com::Submode::RX_ONLY, COM_TABLE_RX_ONLY_TRANS_0.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_ONLY_TRANS_0.first, &COM_TABLE_RX_ONLY_TRANS_0.second)),
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ctxc);
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// Build RX Only transition 1
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iht(objects::CCSDS_HANDLER, OFF, 0, COM_TABLE_RX_ONLY_TRANS_1.second);
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2023-01-27 14:44:40 +01:00
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check(ss.addTable(TableEntry(COM_TABLE_RX_ONLY_TRANS_1.first, &COM_TABLE_RX_ONLY_TRANS_1.second)),
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ctxc);
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2023-01-26 17:18:05 +01:00
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// Build TX OFF sequence
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ihs(COM_SEQUENCE_RX_ONLY.second, COM_TABLE_RX_ONLY_TGT.first, 0, true);
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2023-01-27 20:23:55 +01:00
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ihs(COM_SEQUENCE_RX_ONLY.second, COM_TABLE_RX_ONLY_TRANS_0.first, 0, false);
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2023-01-27 17:34:22 +01:00
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ihs(COM_SEQUENCE_RX_ONLY.second, COM_TABLE_RX_ONLY_TRANS_1.first, 0, false);
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2023-01-27 14:44:40 +01:00
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check(ss.addSequence(SequenceEntry(COM_SEQUENCE_RX_ONLY.first, &COM_SEQUENCE_RX_ONLY.second,
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COM_SEQUENCE_RX_ONLY.first)),
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ctxc);
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}
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void buildTxAndRxLowRateSequence(Subsystem& ss, ModeListEntry& eh) {
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std::string context = "satsystem::com::buildTxAndRxLowRateSequence";
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auto ctxc = context.c_str();
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// Insert Helper Table
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auto iht = [&](object_id_t obj, Mode_t mode, Submode_t submode, ArrayList<ModeListEntry>& table) {
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eh.setObject(obj);
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eh.setMode(mode);
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eh.setSubmode(submode);
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check(table.insert(eh), ctxc);
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};
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// Insert Helper Sequence
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auto ihs = [&](ArrayList<ModeListEntry>& sequence, Mode_t tableId, uint32_t waitSeconds,
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bool checkSuccess) {
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eh.setTableId(tableId);
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eh.setWaitSeconds(waitSeconds);
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eh.setCheckSuccess(checkSuccess);
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check(sequence.insert(eh), ctxc);
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};
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// Build RX and TX low datarate table.
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iht(objects::SYRLINKS_HANDLER, NML, ::com::Submode::RX_AND_TX_LOW_DATARATE,
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COM_TABLE_RX_AND_TX_LOW_RATE_TGT.second);
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2023-01-27 15:19:09 +01:00
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iht(objects::CCSDS_HANDLER, ON, static_cast<Submode_t>(::com::CcsdsSubmode::DATARATE_LOW),
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2023-01-27 14:44:40 +01:00
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COM_TABLE_RX_AND_TX_LOW_RATE_TGT.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_LOW_RATE_TGT.first,
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&COM_TABLE_RX_AND_TX_LOW_RATE_TGT.second)),
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ctxc);
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// Build TX and RX low datarate transition 0, switch CCSDS handler first
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2023-01-27 15:19:09 +01:00
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iht(objects::CCSDS_HANDLER, ON, static_cast<Submode_t>(::com::CcsdsSubmode::DATARATE_LOW),
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2023-01-27 14:44:40 +01:00
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COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_0.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_0.first,
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&COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_0.second)),
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ctxc);
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// Build TX and RX low transition 1
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iht(objects::SYRLINKS_HANDLER, NML, ::com::Submode::RX_AND_TX_LOW_DATARATE,
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COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_1.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_1.first,
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&COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_1.second)),
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ctxc);
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// Build TX and RX low datarate sequence
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ihs(COM_SEQUENCE_RX_AND_TX_LOW_RATE.second, COM_TABLE_RX_AND_TX_LOW_RATE_TGT.first, 0, true);
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2023-01-28 12:52:00 +01:00
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ihs(COM_SEQUENCE_RX_AND_TX_LOW_RATE.second, COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_0.first, 0, false);
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ihs(COM_SEQUENCE_RX_AND_TX_LOW_RATE.second, COM_TABLE_RX_AND_TX_LOW_RATE_TRANS_1.first, 0, false);
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2023-01-27 14:44:40 +01:00
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check(ss.addSequence(SequenceEntry(COM_SEQUENCE_RX_AND_TX_LOW_RATE.first,
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&COM_SEQUENCE_RX_AND_TX_LOW_RATE.second,
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COM_SEQUENCE_RX_ONLY.first)),
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2023-01-26 17:18:05 +01:00
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ctxc);
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}
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2023-01-27 14:44:40 +01:00
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void buildTxAndRxHighRateSequence(Subsystem& ss, ModeListEntry& eh) {
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std::string context = "satsystem::com::buildTxAndRxHighRateSequence";
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2023-01-26 17:18:05 +01:00
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auto ctxc = context.c_str();
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// Insert Helper Table
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auto iht = [&](object_id_t obj, Mode_t mode, Submode_t submode, ArrayList<ModeListEntry>& table) {
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eh.setObject(obj);
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eh.setMode(mode);
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eh.setSubmode(submode);
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check(table.insert(eh), ctxc);
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};
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// Insert Helper Sequence
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auto ihs = [&](ArrayList<ModeListEntry>& sequence, Mode_t tableId, uint32_t waitSeconds,
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bool checkSuccess) {
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eh.setTableId(tableId);
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eh.setWaitSeconds(waitSeconds);
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eh.setCheckSuccess(checkSuccess);
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check(sequence.insert(eh), ctxc);
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};
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2023-01-27 20:23:55 +01:00
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// Build RX and TX high datarate table.
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2023-01-27 14:44:40 +01:00
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iht(objects::SYRLINKS_HANDLER, NML, ::com::Submode::RX_AND_TX_HIGH_DATARATE,
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COM_TABLE_RX_AND_TX_HIGH_RATE_TGT.second);
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2023-01-27 15:19:09 +01:00
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iht(objects::CCSDS_HANDLER, ON, static_cast<Submode_t>(::com::CcsdsSubmode::DATARATE_HIGH),
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2023-01-27 14:44:40 +01:00
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COM_TABLE_RX_AND_TX_HIGH_RATE_TGT.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_HIGH_RATE_TGT.first,
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&COM_TABLE_RX_AND_TX_HIGH_RATE_TGT.second)),
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ctxc);
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2023-01-27 20:23:55 +01:00
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// Build TX and RX high datarate transition 0, switch CCSDS handler first
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2023-01-27 15:19:09 +01:00
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iht(objects::CCSDS_HANDLER, ON, static_cast<Submode_t>(::com::CcsdsSubmode::DATARATE_HIGH),
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2023-01-27 14:44:40 +01:00
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COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_0.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_0.first,
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&COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_0.second)),
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ctxc);
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2023-01-26 17:18:05 +01:00
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2023-01-27 20:23:55 +01:00
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// Build TX and RX high transition 1
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2023-01-27 14:44:40 +01:00
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iht(objects::SYRLINKS_HANDLER, NML, ::com::Submode::RX_AND_TX_HIGH_DATARATE,
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COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_1.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_1.first,
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&COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_1.second)),
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ctxc);
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2023-01-26 17:18:05 +01:00
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2023-01-27 14:44:40 +01:00
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// Build TX and RX low datarate sequence
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ihs(COM_SEQUENCE_RX_AND_TX_HIGH_RATE.second, COM_TABLE_RX_AND_TX_HIGH_RATE_TGT.first, 0, true);
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ihs(COM_SEQUENCE_RX_AND_TX_HIGH_RATE.second, COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_0.first, 0,
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2023-01-28 12:52:00 +01:00
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false);
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2023-01-27 14:44:40 +01:00
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ihs(COM_SEQUENCE_RX_AND_TX_HIGH_RATE.second, COM_TABLE_RX_AND_TX_HIGH_RATE_TRANS_1.first, 0,
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2023-01-28 12:52:00 +01:00
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false);
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2023-01-27 14:44:40 +01:00
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check(ss.addSequence(SequenceEntry(COM_SEQUENCE_RX_AND_TX_HIGH_RATE.first,
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&COM_SEQUENCE_RX_AND_TX_HIGH_RATE.second,
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COM_SEQUENCE_RX_ONLY.first)),
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2023-01-26 17:18:05 +01:00
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ctxc);
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}
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2023-01-27 20:23:55 +01:00
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void buildTxAndRxDefaultRateSequence(Subsystem& ss, ModeListEntry& eh) {
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std::string context = "satsystem::com::buildTxAndRxDefaultRateSequence";
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auto ctxc = context.c_str();
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// Insert Helper Table
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auto iht = [&](object_id_t obj, Mode_t mode, Submode_t submode, ArrayList<ModeListEntry>& table) {
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eh.setObject(obj);
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eh.setMode(mode);
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eh.setSubmode(submode);
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check(table.insert(eh), ctxc);
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};
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// Insert Helper Sequence
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auto ihs = [&](ArrayList<ModeListEntry>& sequence, Mode_t tableId, uint32_t waitSeconds,
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bool checkSuccess) {
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eh.setTableId(tableId);
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eh.setWaitSeconds(waitSeconds);
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eh.setCheckSuccess(checkSuccess);
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check(sequence.insert(eh), ctxc);
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};
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// Build RX and TX default datarate table.
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iht(objects::SYRLINKS_HANDLER, NML, ::com::Submode::RX_AND_TX_DEFAULT_DATARATE,
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COM_TABLE_RX_AND_TX_DEFAULT_RATE_TGT.second);
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iht(objects::CCSDS_HANDLER, ON, static_cast<Submode_t>(::com::CcsdsSubmode::DATARATE_DEFAULT),
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COM_TABLE_RX_AND_TX_DEFAULT_RATE_TGT.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_DEFAULT_RATE_TGT.first,
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&COM_TABLE_RX_AND_TX_DEFAULT_RATE_TGT.second)),
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ctxc);
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// Build TX and RX low datarate transition 0, switch CCSDS handler first
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iht(objects::CCSDS_HANDLER, ON, static_cast<Submode_t>(::com::CcsdsSubmode::DATARATE_DEFAULT),
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COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_0.second);
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_0.first,
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&COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_0.second)),
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ctxc);
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// Build TX and RX default transition 1
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iht(objects::SYRLINKS_HANDLER, NML, ::com::Submode::RX_AND_TX_DEFAULT_DATARATE,
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2023-01-28 12:47:21 +01:00
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COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_1.second);
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2023-01-27 20:23:55 +01:00
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check(ss.addTable(TableEntry(COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_1.first,
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&COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_1.second)),
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ctxc);
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// Build TX and RX default datarate sequence
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ihs(COM_SEQUENCE_RX_AND_TX_DEFAULT_RATE.second, COM_TABLE_RX_AND_TX_DEFAULT_RATE_TGT.first, 0,
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true);
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ihs(COM_SEQUENCE_RX_AND_TX_DEFAULT_RATE.second, COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_0.first, 0,
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2023-01-28 12:52:00 +01:00
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false);
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2023-01-27 20:23:55 +01:00
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ihs(COM_SEQUENCE_RX_AND_TX_DEFAULT_RATE.second, COM_TABLE_RX_AND_TX_DEFAULT_RATE_TRANS_1.first, 0,
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false);
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check(ss.addSequence(SequenceEntry(COM_SEQUENCE_RX_AND_TX_DEFAULT_RATE.first,
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&COM_SEQUENCE_RX_AND_TX_DEFAULT_RATE.second,
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COM_SEQUENCE_RX_ONLY.first)),
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ctxc);
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}
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2023-01-26 17:18:05 +01:00
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} // namespace
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