Commit Graph

177 Commits

Author SHA1 Message Date
79a5847b67 Sus handler complete 2021-05-12 16:38:20 +02:00
48af7ef0fb sus delay implementation 2021-05-12 13:06:56 +02:00
50d9365702 changed SusHandler MAX1227 to internal clock mode 2021-05-10 11:13:39 +02:00
189bdb7c90 working SUS in externally clocked mode 2021-05-09 16:48:55 +02:00
906c813e4c write setup byte and conversions 2021-05-09 14:46:42 +02:00
07d337c6ad this works with q7s and new sus 2021-05-09 14:39:56 +02:00
95f09469d1 this works with the old SUS 2021-05-09 12:09:39 +02:00
451729b103 this worked with the prototype SUS 2021-05-09 10:06:36 +02:00
6861cd399e some tries to get data from max1227 in externally clocked mode 2021-05-08 22:49:21 +02:00
f4eb5d81ba save before making change in spicomif 2021-05-07 18:48:42 +02:00
931c17e971 save before implementing SusHandler with chip select 2021-05-06 18:00:58 +02:00
80b32331c9 rad sensor working 2021-05-03 13:35:16 +02:00
8d2993f88d rad sensor change wip 2021-05-03 11:59:33 +02:00
b708028c61 spi decoder callbacks wip 2021-05-02 13:48:39 +02:00
fef6cf4abe Merge branch 'meier/master' into meier/max1227Handler 2021-04-30 09:04:20 +02:00
34ad009707 integrated gyro and mgm handler 2021-04-29 17:45:19 +02:00
f0075f7789 max1227 wip 2021-04-29 10:40:11 +02:00
0430579795 basic structure for ILH PLOC control 2021-04-27 17:34:50 +02:00
73d56559c3 added PLOC sequence count. Not tested yet 2021-04-27 12:18:04 +02:00
c5aced2070 fixed conflicts 2021-04-26 17:59:26 +02:00
d63c825c7f fixed merge conflicts 2021-04-26 17:50:36 +02:00
ebdc492ed1 self test wip 2021-04-26 14:25:23 +02:00
4c146b27c9 corrections in plocHandler, endianness 2021-04-26 11:28:19 +02:00
bbb50e4b4f imqt base functions 2021-04-26 07:56:02 +02:00
ec76222907 added wiretapping mode check in handleDeviceTm of PlocHandler 2021-04-25 15:54:48 +02:00
84a0935f63 get commanded dipole wip 2021-04-25 15:53:44 +02:00
56c0c551cb imqt wip 2021-04-25 12:47:41 +02:00
766c460629 merged mueller master 2021-04-25 09:33:21 +02:00
Martin Zietz
2c40bf86fb typo fix 2021-04-24 14:55:15 +02:00
c54eccfe43 tc mem write and tc mem read implemented 2021-04-22 17:32:39 +02:00
a973d67d07 changes in plocDefinitions and plocHandler 2021-04-19 17:17:22 +02:00
cc075844fd wip 2021-04-16 18:59:48 +02:00
e2242ed526 plocHandler wip 2021-04-15 13:17:15 +02:00
67cc196169 plocHandler wip 2021-04-12 10:16:59 +02:00
5909d4811b plocHandler wip 2021-04-11 12:04:13 +02:00
08351bcda2 added more spi test code, preprocessor defines
and various bugfixes
2021-04-02 15:14:08 +02:00
9cec3f4b1a fixes in imqt 2021-03-29 16:40:14 +02:00
5179954176 ploc handler wip 2021-03-29 14:37:52 +02:00
34ef313ab0 imqt handler compiled 2021-03-26 13:55:32 +01:00
d953a9ff32 fixed merge conflicts 2021-03-26 12:30:24 +01:00
d764b77a83 transition delay set to 5000 again 2021-03-25 17:15:54 +01:00
0b4dac0e3d rtd handler improvements 2021-03-24 12:53:25 +01:00
Martin Zietz
88138af39d solved all merge conflicts 2021-03-22 13:09:06 +01:00
Martin Zietz
f01656df4c deleted polling sequence file 2021-03-22 12:47:45 +01:00
3fd5f72d00 IMTQHandler wip 2021-03-21 17:35:14 +01:00
97c5d01d2e IMTQ dipole actuation command, wip 2021-03-19 15:33:43 +01:00
9a55eb5508 IMQT wip 2021-03-17 11:14:48 +01:00
a2044d38bc rtd handler compiled 2021-03-13 14:42:30 +01:00
667c91d47e lowered transition times and changed pst to 1sec 2021-03-07 14:11:13 +01:00
0db53f44c3 L3DG20H device handler tested 2021-03-07 14:06:29 +01:00