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1c08574e3e |
19
CHANGELOG.md
19
CHANGELOG.md
@ -10,9 +10,20 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
|
||||
|
||||
## [v0.2.0]
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||||
|
||||
## [v0.1.1]
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- Authorative repository was transferred to https://egit.irs.uni-stuttgart.de/rust/va108xx-rs but
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there still will be a GitHub mirror. Project relicensed as Apache-2.0 only
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||||
|
||||
- Relicensed under dual Apache-2.0 / MIT license
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## [v0.1.3]
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### Added
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||||
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- Added two missing bit fields for I2CA STATUS register: I2CIDLE and IDLE
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### Fixed
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- Made I2CA STATUS register read-only
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## [v0.1.2]
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|
||||
### Fixed
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||||
|
||||
@ -20,6 +31,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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https://github.com/rust-embedded/svd2rust/pull/549 for more details.
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Some bitmasks were missing from register reader definitions.
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## [v0.1.1]
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||||
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||||
- Relicensed under dual Apache-2.0 / MIT license
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||||
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||||
### Changed
|
||||
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||||
- SVD file handling improved and new fields added for the peripheral
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||||
|
10
Cargo.toml
10
Cargo.toml
@ -1,12 +1,12 @@
|
||||
[package]
|
||||
name = "va108xx"
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version = "0.1.2"
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authors = ["Robin Mueller <robin.mueller.m@gmail.com>"]
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version = "0.2.2"
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authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
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edition = "2021"
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description = "PAC for the Vorago VA108xx family of microcontrollers"
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homepage = "https://github.com/robamu-org/va108xx-rs"
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repository = "https://github.com/robamu-org/va108xx-rs"
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license = "MIT OR Apache-2.0"
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homepage = "https://egit.irs.uni-stuttgart.de/rust/va108xx-rs"
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repository = "https://egit.irs.uni-stuttgart.de/rust/va108xx-rs"
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license = "Apache-2.0"
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keywords = ["no-std", "arm", "cortex-m", "vorago", "va108xx"]
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categories = ["embedded", "no-std", "hardware-support"]
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|
25
LICENSE-MIT
25
LICENSE-MIT
@ -1,25 +0,0 @@
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Copyright (c) 2021 Robin Mueller
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|
||||
Permission is hereby granted, free of charge, to any
|
||||
person obtaining a copy of this software and associated
|
||||
documentation files (the "Software"), to deal in the
|
||||
Software without restriction, including without
|
||||
limitation the rights to use, copy, modify, merge,
|
||||
publish, distribute, sublicense, and/or sell copies of
|
||||
the Software, and to permit persons to whom the Software
|
||||
is furnished to do so, subject to the following
|
||||
conditions:
|
||||
|
||||
The above copyright notice and this permission notice
|
||||
shall be included in all copies or substantial portions
|
||||
of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
|
||||
ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
|
||||
TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
|
||||
PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
|
||||
SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
|
||||
IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
DEALINGS IN THE SOFTWARE.
|
3
NOTICE
Normal file
3
NOTICE
Normal file
@ -0,0 +1,3 @@
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Peripheral access crate for the Vorago VA108xx family microcontrollers
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This software contains code developed at the University of Stuttgart.
|
@ -15,7 +15,7 @@ To use this crate, add this to your `Cargo.toml`
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```toml
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[dependencies.va108xx]
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version = "0.1"
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version = "<Most Recent Version>"
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||||
features = ["rt"]
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```
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||||
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||||
|
11
automation/Dockerfile
Normal file
11
automation/Dockerfile
Normal file
@ -0,0 +1,11 @@
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||||
# Run the following commands from root directory to build and run locally
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||||
# docker build -f automation/Dockerfile -t <NAME> .
|
||||
# docker run -it <NAME>
|
||||
FROM rust:latest
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||||
RUN apt-get update
|
||||
RUN apt-get --yes upgrade
|
||||
# tzdata is a dependency, won't install otherwise
|
||||
ARG DEBIAN_FRONTEND=noninteractive
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||||
|
||||
RUN rustup target add thumbv6m-none-eabi && \
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||||
rustup component add rustfmt clippy
|
39
automation/Jenkinsfile
vendored
Normal file
39
automation/Jenkinsfile
vendored
Normal file
@ -0,0 +1,39 @@
|
||||
pipeline {
|
||||
agent any
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||||
|
||||
stages {
|
||||
stage('Clippy') {
|
||||
agent {
|
||||
dockerfile {
|
||||
dir 'automation'
|
||||
reuseNode true
|
||||
}
|
||||
}
|
||||
steps {
|
||||
sh 'cargo clippy'
|
||||
}
|
||||
}
|
||||
stage('Rustfmt') {
|
||||
agent {
|
||||
dockerfile {
|
||||
dir 'automation'
|
||||
reuseNode true
|
||||
}
|
||||
}
|
||||
steps {
|
||||
sh 'cargo fmt'
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||||
}
|
||||
}
|
||||
stage('Build') {
|
||||
agent {
|
||||
dockerfile {
|
||||
dir 'automation'
|
||||
reuseNode true
|
||||
}
|
||||
}
|
||||
steps {
|
||||
sh 'cargo build'
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
@ -13,27 +13,6 @@ impl From<crate::R<STATUS_SPEC>> for R {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Register `STATUS` writer"]
|
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pub struct W(crate::W<STATUS_SPEC>);
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impl core::ops::Deref for W {
|
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type Target = crate::W<STATUS_SPEC>;
|
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#[inline(always)]
|
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fn deref(&self) -> &Self::Target {
|
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&self.0
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||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<STATUS_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<STATUS_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `WAITING` reader - Controller is Waiting"]
|
||||
pub struct WAITING_R(crate::FieldReader<bool, bool>);
|
||||
impl WAITING_R {
|
||||
@ -49,28 +28,6 @@ impl core::ops::Deref for WAITING_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `WAITING` writer - Controller is Waiting"]
|
||||
pub struct WAITING_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> WAITING_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
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}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
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||||
self.w
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||||
}
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||||
}
|
||||
#[doc = "Field `STALLED` reader - Controller is Stalled"]
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||||
pub struct STALLED_R(crate::FieldReader<bool, bool>);
|
||||
impl STALLED_R {
|
||||
@ -86,28 +43,6 @@ impl core::ops::Deref for STALLED_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `STALLED` writer - Controller is Stalled"]
|
||||
pub struct STALLED_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> STALLED_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `ARBLOST` reader - I2C Arbitration was lost"]
|
||||
pub struct ARBLOST_R(crate::FieldReader<bool, bool>);
|
||||
impl ARBLOST_R {
|
||||
@ -123,28 +58,6 @@ impl core::ops::Deref for ARBLOST_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `ARBLOST` writer - I2C Arbitration was lost"]
|
||||
pub struct ARBLOST_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> ARBLOST_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `NACKADDR` reader - I2C Address was not Acknowledged"]
|
||||
pub struct NACKADDR_R(crate::FieldReader<bool, bool>);
|
||||
impl NACKADDR_R {
|
||||
@ -160,28 +73,6 @@ impl core::ops::Deref for NACKADDR_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `NACKADDR` writer - I2C Address was not Acknowledged"]
|
||||
pub struct NACKADDR_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> NACKADDR_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `NACKDATA` reader - I2C Data was not Acknowledged"]
|
||||
pub struct NACKDATA_R(crate::FieldReader<bool, bool>);
|
||||
impl NACKDATA_R {
|
||||
@ -197,28 +88,6 @@ impl core::ops::Deref for NACKDATA_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"]
|
||||
pub struct NACKDATA_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> NACKDATA_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RXNEMPTY` reader - RX FIFO is Not Empty"]
|
||||
pub struct RXNEMPTY_R(crate::FieldReader<bool, bool>);
|
||||
impl RXNEMPTY_R {
|
||||
@ -234,28 +103,6 @@ impl core::ops::Deref for RXNEMPTY_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RXNEMPTY` writer - RX FIFO is Not Empty"]
|
||||
pub struct RXNEMPTY_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> RXNEMPTY_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RXFULL` reader - RX FIFO is Full"]
|
||||
pub struct RXFULL_R(crate::FieldReader<bool, bool>);
|
||||
impl RXFULL_R {
|
||||
@ -271,28 +118,6 @@ impl core::ops::Deref for RXFULL_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RXFULL` writer - RX FIFO is Full"]
|
||||
pub struct RXFULL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> RXFULL_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RXTRIGGER` reader - RX FIFO Above Trigger Level"]
|
||||
pub struct RXTRIGGER_R(crate::FieldReader<bool, bool>);
|
||||
impl RXTRIGGER_R {
|
||||
@ -308,28 +133,6 @@ impl core::ops::Deref for RXTRIGGER_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RXTRIGGER` writer - RX FIFO Above Trigger Level"]
|
||||
pub struct RXTRIGGER_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> RXTRIGGER_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `TXEMPTY` reader - TX FIFO is Empty"]
|
||||
pub struct TXEMPTY_R(crate::FieldReader<bool, bool>);
|
||||
impl TXEMPTY_R {
|
||||
@ -345,28 +148,6 @@ impl core::ops::Deref for TXEMPTY_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `TXEMPTY` writer - TX FIFO is Empty"]
|
||||
pub struct TXEMPTY_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> TXEMPTY_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `TXNFULL` reader - TX FIFO is Full"]
|
||||
pub struct TXNFULL_R(crate::FieldReader<bool, bool>);
|
||||
impl TXNFULL_R {
|
||||
@ -382,28 +163,6 @@ impl core::ops::Deref for TXNFULL_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `TXNFULL` writer - TX FIFO is Full"]
|
||||
pub struct TXNFULL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> TXNFULL_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `TXTRIGGER` reader - TX FIFO Below Trigger Level"]
|
||||
pub struct TXTRIGGER_R(crate::FieldReader<bool, bool>);
|
||||
impl TXTRIGGER_R {
|
||||
@ -419,28 +178,6 @@ impl core::ops::Deref for TXTRIGGER_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `TXTRIGGER` writer - TX FIFO Below Trigger Level"]
|
||||
pub struct TXTRIGGER_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> TXTRIGGER_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RAW_SDA` reader - I2C Raw SDA value"]
|
||||
pub struct RAW_SDA_R(crate::FieldReader<bool, bool>);
|
||||
impl RAW_SDA_R {
|
||||
@ -456,28 +193,6 @@ impl core::ops::Deref for RAW_SDA_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RAW_SDA` writer - I2C Raw SDA value"]
|
||||
pub struct RAW_SDA_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> RAW_SDA_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RAW_SCL` reader - I2C Raw SCL value"]
|
||||
pub struct RAW_SCL_R(crate::FieldReader<bool, bool>);
|
||||
impl RAW_SCL_R {
|
||||
@ -493,26 +208,34 @@ impl core::ops::Deref for RAW_SCL_R {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `RAW_SCL` writer - I2C Raw SCL value"]
|
||||
pub struct RAW_SCL_W<'a> {
|
||||
w: &'a mut W,
|
||||
#[doc = "Field `I2C_IDLE` reader - I2C bus is Idle"]
|
||||
pub struct I2C_IDLE_R(crate::FieldReader<bool, bool>);
|
||||
impl I2C_IDLE_R {
|
||||
#[inline(always)]
|
||||
pub(crate) fn new(bits: bool) -> Self {
|
||||
I2C_IDLE_R(crate::FieldReader::new(bits))
|
||||
}
|
||||
}
|
||||
impl<'a> RAW_SCL_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
impl core::ops::Deref for I2C_IDLE_R {
|
||||
type Target = crate::FieldReader<bool, bool>;
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
}
|
||||
#[doc = "Field `IDLE` reader - Controller is Idle"]
|
||||
pub struct IDLE_R(crate::FieldReader<bool, bool>);
|
||||
impl IDLE_R {
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
pub(crate) fn new(bits: bool) -> Self {
|
||||
IDLE_R(crate::FieldReader::new(bits))
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
}
|
||||
impl core::ops::Deref for IDLE_R {
|
||||
type Target = crate::FieldReader<bool, bool>;
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
|
||||
self.w
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
@ -581,81 +304,18 @@ impl R {
|
||||
pub fn raw_scl(&self) -> RAW_SCL_R {
|
||||
RAW_SCL_R::new(((self.bits >> 31) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 2 - Controller is Waiting"]
|
||||
#[doc = "Bit 0 - I2C bus is Idle"]
|
||||
#[inline(always)]
|
||||
pub fn waiting(&mut self) -> WAITING_W {
|
||||
WAITING_W { w: self }
|
||||
pub fn i2c_idle(&self) -> I2C_IDLE_R {
|
||||
I2C_IDLE_R::new((self.bits & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Controller is Stalled"]
|
||||
#[doc = "Bit 1 - Controller is Idle"]
|
||||
#[inline(always)]
|
||||
pub fn stalled(&mut self) -> STALLED_W {
|
||||
STALLED_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 4 - I2C Arbitration was lost"]
|
||||
#[inline(always)]
|
||||
pub fn arblost(&mut self) -> ARBLOST_W {
|
||||
ARBLOST_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 5 - I2C Address was not Acknowledged"]
|
||||
#[inline(always)]
|
||||
pub fn nackaddr(&mut self) -> NACKADDR_W {
|
||||
NACKADDR_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 6 - I2C Data was not Acknowledged"]
|
||||
#[inline(always)]
|
||||
pub fn nackdata(&mut self) -> NACKDATA_W {
|
||||
NACKDATA_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 8 - RX FIFO is Not Empty"]
|
||||
#[inline(always)]
|
||||
pub fn rxnempty(&mut self) -> RXNEMPTY_W {
|
||||
RXNEMPTY_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 9 - RX FIFO is Full"]
|
||||
#[inline(always)]
|
||||
pub fn rxfull(&mut self) -> RXFULL_W {
|
||||
RXFULL_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 11 - RX FIFO Above Trigger Level"]
|
||||
#[inline(always)]
|
||||
pub fn rxtrigger(&mut self) -> RXTRIGGER_W {
|
||||
RXTRIGGER_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 12 - TX FIFO is Empty"]
|
||||
#[inline(always)]
|
||||
pub fn txempty(&mut self) -> TXEMPTY_W {
|
||||
TXEMPTY_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 13 - TX FIFO is Full"]
|
||||
#[inline(always)]
|
||||
pub fn txnfull(&mut self) -> TXNFULL_W {
|
||||
TXNFULL_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 15 - TX FIFO Below Trigger Level"]
|
||||
#[inline(always)]
|
||||
pub fn txtrigger(&mut self) -> TXTRIGGER_W {
|
||||
TXTRIGGER_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - I2C Raw SDA value"]
|
||||
#[inline(always)]
|
||||
pub fn raw_sda(&mut self) -> RAW_SDA_W {
|
||||
RAW_SDA_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 31 - I2C Raw SCL value"]
|
||||
#[inline(always)]
|
||||
pub fn raw_scl(&mut self) -> RAW_SCL_W {
|
||||
RAW_SCL_W { w: self }
|
||||
}
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
pub fn idle(&self) -> IDLE_R {
|
||||
IDLE_R::new(((self.bits >> 1) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
#[doc = "I2C Controller Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
|
||||
#[doc = "I2C Controller Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
|
||||
pub struct STATUS_SPEC;
|
||||
impl crate::RegisterSpec for STATUS_SPEC {
|
||||
type Ux = u32;
|
||||
@ -664,10 +324,6 @@ impl crate::RegisterSpec for STATUS_SPEC {
|
||||
impl crate::Readable for STATUS_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
|
||||
impl crate::Writable for STATUS_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets STATUS to value 0"]
|
||||
impl crate::Resettable for STATUS_SPEC {
|
||||
#[inline(always)]
|
||||
|
@ -1,4 +1,4 @@
|
||||
#![doc = "Peripheral access API for VA108XX microcontrollers (generated using svd2rust v0.19.0 (43be074 2021-11-09))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
|
||||
#![doc = "Peripheral access API for VA108XX microcontrollers (generated using svd2rust v0.19.0 (877196f 2021-11-14))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
|
||||
svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.19.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
|
||||
#![deny(const_err)]
|
||||
#![deny(dead_code)]
|
||||
|
@ -2157,7 +2157,7 @@
|
||||
<name>STATUS</name>
|
||||
<description>I2C Controller Status Register</description>
|
||||
<addressOffset>0x018</addressOffset>
|
||||
<fields>
|
||||
<access>read-only</access><fields>
|
||||
<field>
|
||||
<name>WAITING</name>
|
||||
<description>Controller is Waiting</description>
|
||||
@ -2223,7 +2223,9 @@
|
||||
<description>I2C Raw SCL value</description>
|
||||
<bitRange>[31:31]</bitRange>
|
||||
</field>
|
||||
</fields>
|
||||
<field><name>I2C_IDLE</name><description>I2C bus is Idle</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field>
|
||||
<field><name>IDLE</name><description>Controller is Idle</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field>
|
||||
</fields>
|
||||
</register>
|
||||
<register>
|
||||
<name>STATE</name>
|
||||
|
@ -56,4 +56,18 @@ SYSCONFIG:
|
||||
bitOffset: 24
|
||||
bitWidth: 1
|
||||
|
||||
|
||||
# I2CB is derived from I2CA
|
||||
I2CA:
|
||||
_modify:
|
||||
STATUS:
|
||||
access: read-only
|
||||
STATUS:
|
||||
_add:
|
||||
I2C_IDLE:
|
||||
description: I2C bus is Idle
|
||||
bitOffset: 0
|
||||
bitWidth: 1
|
||||
IDLE:
|
||||
description: Controller is Idle
|
||||
bitOffset: 1
|
||||
bitWidth: 1
|
||||
|
Reference in New Issue
Block a user