Commit Graph

82 Commits

Author SHA1 Message Date
16e2148f84 initializing query size 2021-05-24 14:37:31 +02:00
fbac40e9cd test pst 2021-05-24 01:20:44 +02:00
08847e708a some objects missing 2021-05-18 16:49:24 +02:00
d9abf60db1 fix for hosted bsp 2021-05-18 16:17:51 +02:00
68158097d9 bsp name is gen csv 2021-05-18 16:16:02 +02:00
bd5badb90d updated all auto-generated files 2021-05-18 16:14:11 +02:00
623f52398e moved fsfwconfig into linux folder 2021-05-17 20:03:56 +02:00
3dca311baa generated event translation files 2021-05-17 19:39:35 +02:00
d380e3106a q7s compiling 2021-05-17 16:53:06 +02:00
6f9a1853ff host compiling again 2021-05-17 16:37:29 +02:00
dcc5a15010 Merge remote-tracking branch 'origin/develop' into mueller/master 2021-05-17 16:02:04 +02:00
32d39c4d43 fixes for bbb build 2021-05-05 22:47:24 +02:00
d63c825c7f fixed merge conflicts 2021-04-26 17:50:36 +02:00
c54eccfe43 tc mem write and tc mem read implemented 2021-04-22 17:32:39 +02:00
f2c7bfc942 resolved merge conflicts 2021-04-10 22:22:39 +02:00
e43266490d non block almostr eworking 2021-04-02 16:44:25 +02:00
e98e04a940 minor formatting stuff 2021-04-02 15:26:57 +02:00
08351bcda2 added more spi test code, preprocessor defines
and various bugfixes
2021-04-02 15:14:08 +02:00
1134505457 now its compiling 2021-04-01 16:33:30 +02:00
0ad380842e Merge branch 'meier/max13865pt1000Handler' into mueller/master 2021-04-01 16:22:25 +02:00
c3f97dde30 fixes 2021-04-01 16:21:24 +02:00
6f49031e92 some adaptions 2021-04-01 15:42:51 +02:00
fe4c8ad136 Merge branch 'mueller/master' into meier/max13865pt1000Handler 2021-04-01 15:34:28 +02:00
330aba7ea5 compiling 2021-04-01 15:14:50 +02:00
79a66cee6a added rpi acs board code to q7s 2021-04-01 14:06:56 +02:00
a91c24a3a7 deleted folder which was moved 2021-04-01 11:07:56 +02:00
ed46e6f1bb moved i2c to fsfw_hal as well 2021-04-01 11:06:26 +02:00
c0bb934ddb moved spi code to fsfw_hal 2021-04-01 10:59:36 +02:00
0b4dac0e3d rtd handler improvements 2021-03-24 12:53:25 +01:00
88d0f9fc0e using new fsfw_hal now 2021-03-23 16:45:07 +01:00
485f61041f integrating fsfw_hal 2021-03-23 16:15:31 +01:00
Martin Zietz
88138af39d solved all merge conflicts 2021-03-22 13:09:06 +01:00
Martin Zietz
f01656df4c deleted polling sequence file 2021-03-22 12:47:45 +01:00
f8b2d237e8 fixed for fsfw update 2021-03-19 15:52:39 +01:00
a2044d38bc rtd handler compiled 2021-03-13 14:42:30 +01:00
0db53f44c3 L3DG20H device handler tested 2021-03-07 14:06:29 +01:00
ff89742442 added l3g handler 2021-03-07 12:50:41 +01:00
9cdf5f0f67 simple rm3100 test working now 2021-03-06 20:21:23 +01:00
f0aca50356 started rm3100 testing 2021-03-06 18:12:50 +01:00
d1eaa88772 fixed merge conflict and copied max13865 code 2021-03-05 12:57:42 +01:00
4291df77b1 moved some files 2021-03-04 18:29:28 +01:00
f761789154 added readout of some tx registers 2021-02-27 11:07:42 +01:00
873412f3fb spi com if basic verification complete 2021-02-24 11:16:33 +01:00
961dd7f769 added some testcode, zero init spi struct 2021-02-24 10:36:23 +01:00
288bc0d38e lis 3 basic test code 2021-02-24 00:24:14 +01:00
f67948524f disabled tests by default 2021-02-23 18:19:11 +01:00
cd27b7e7c2 added stopwatch include 2021-02-23 18:18:12 +01:00
e32de64f21 removed obsolete printout 2021-02-23 18:14:23 +01:00
048b239b92 spi bugfixes 2021-02-23 18:01:28 +01:00
cfa76499ad continued test class 2021-02-23 17:05:48 +01:00