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9d20b8878e
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additional include and warning fixes
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2021-07-13 10:22:22 +02:00 |
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ee875460e7
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Merge pull request 'meier/master' (#14) from meier/master into master
Reviewed-on: #14
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2021-07-12 20:21:21 +02:00 |
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Jakob.Meier
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88769bb46c
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replaced sif::debug by sif::warning
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2021-07-12 20:16:45 +02:00 |
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Jakob.Meier
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9c98f41a96
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Merge branch 'master' of https://egit.irs.uni-stuttgart.de/fsfw/fsfw-hal into meier/master
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2021-07-11 13:29:29 +02:00 |
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Jakob.Meier
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323008c64a
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added setUartMode in configuration function
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2021-07-11 13:29:05 +02:00 |
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Jakob.Meier
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866868b25f
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uart support to read all available bytes
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2021-07-08 11:21:27 +02:00 |
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8ff09c95a6
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Merge pull request 'meier/master' (#13) from meier/master into master
Reviewed-on: #13
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2021-06-24 17:31:52 +02:00 |
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2e243e3b29
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Merge branch 'master' into meier/master
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2021-06-24 17:26:09 +02:00 |
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Martin Zietz
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1e0e302308
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callback gpio return code fix
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2021-06-24 14:16:46 +02:00 |
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cd41b6a1f2
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Merge pull request 'UART: fixes for canonical mode' (#12) from mueller/master into master
Reviewed-on: #12
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2021-06-24 10:41:23 +02:00 |
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0f0fc0c2a6
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Merge branch 'master' into mueller/master
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2021-06-24 08:56:44 +02:00 |
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2533af3b53
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fixes for canonical mode
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2021-06-24 08:49:45 +02:00 |
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8fe5d0afa0
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Merge branch 'master' into meier/master
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2021-06-21 17:00:35 +02:00 |
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fce40ebf9a
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Merge pull request 'UART ComIF update' (#11) from mueller/master into master
Reviewed-on: #11
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2021-06-21 16:58:31 +02:00 |
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fe661fff85
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form corrections
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2021-06-21 16:56:41 +02:00 |
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ab01c22b60
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minor form fixes
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2021-06-21 16:51:17 +02:00 |
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5cce521fb0
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missing include added
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2021-06-21 16:45:49 +02:00 |
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37dff77d7e
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fixed merge conflict
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2021-06-21 16:41:43 +02:00 |
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7d0ae8d795
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refactored a bit
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2021-06-21 16:40:27 +02:00 |
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7c23671433
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Merge branch 'master' into meier/master
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2021-06-21 16:33:08 +02:00 |
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Martin Zietz
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e3ddb8b3ba
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adaptions for spi callback
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2021-06-21 14:49:20 +02:00 |
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34db4bd8e8
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Merge branch 'mueller/master' of https://egit.irs.uni-stuttgart.de/fsfw/fsfw-hal into mueller/master
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2021-06-16 19:19:53 +02:00 |
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78e996b2be
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extended uart com if
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2021-06-16 19:19:45 +02:00 |
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83cfafd49e
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important fix
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2021-06-16 10:56:49 +02:00 |
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c0287eb4a6
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Merge remote-tracking branch 'origin/master' into mueller/master
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2021-06-15 16:56:13 +02:00 |
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4cff1aa021
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Merge pull request 'I2C Info, minor fixes, GPIO ctor for simple input pins' (#10) from meier/master into master
Reviewed-on: #10
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2021-06-15 16:55:17 +02:00 |
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457afca582
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minor tweaks
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2021-06-15 16:53:41 +02:00 |
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4f825a10cd
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Merge branch 'meier/master' into mueller/master
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2021-06-15 16:04:45 +02:00 |
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baf65a113c
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now it compiles
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2021-06-15 16:04:35 +02:00 |
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86653b16b0
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Merge branch 'meier/master' of https://egit.irs.uni-stuttgart.de/fsfw/fsfw_hal into meier/master
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2021-06-15 16:02:58 +02:00 |
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f059aeb02d
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Merge pull request 'STM32H7 SpiComIF and first device handler' (#9) from mueller/stm32h7-spi-com-if-l3gd20h-handler into master
Reviewed-on: #9
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2021-06-15 15:50:53 +02:00 |
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eb01fc1c7e
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added debug output to read of I2cComIf
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2021-06-15 15:36:44 +02:00 |
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3f6d2b6083
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Merge branch 'master' into meier/master
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2021-06-15 15:34:36 +02:00 |
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cd9c9647ec
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extended uart com if with canonical mode
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2021-06-15 13:32:37 +02:00 |
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cd0dfc49d5
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Merge remote-tracking branch 'origin/master' into mueller/master
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2021-06-11 10:38:50 +02:00 |
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3e8de10866
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refactored some components
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2021-06-11 10:37:48 +02:00 |
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543ee54cca
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and now the cfg file not needed anymore
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2021-06-10 21:35:26 +02:00 |
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621fe97d5d
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its working
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2021-06-10 21:31:21 +02:00 |
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1611099cb2
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indentation
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2021-06-10 19:11:02 +02:00 |
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8f61c23e62
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refactored everything
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2021-06-10 19:09:33 +02:00 |
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0e79b5f4ae
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fix for sensitivity
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2021-06-10 14:21:59 +02:00 |
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05b64b05a3
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important bugfixes
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2021-06-10 14:17:13 +02:00 |
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92a3f13172
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important bugfixes
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2021-06-10 12:17:47 +02:00 |
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5c40ca9ae8
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refactored spi components for stm32
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2021-06-10 12:05:49 +02:00 |
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499ff5dd12
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added missing definitions file
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2021-06-09 23:54:08 +02:00 |
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04166f87d8
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several important changes for stm32
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2021-06-09 23:20:42 +02:00 |
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d194b759c4
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added uart and i2c stub folders
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2021-06-05 14:51:31 +02:00 |
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93db545a1a
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added cache maintenance op
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2021-06-05 14:50:02 +02:00 |
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a35fdbc5dc
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small fixes and refactoring
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2021-06-05 14:42:20 +02:00 |
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5ff344eee2
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spi com if finished
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2021-06-05 14:31:49 +02:00 |
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